Skip to content

Commit

Permalink
Browse files Browse the repository at this point in the history
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu int…
…o staging

trivial-patches 25-07-2023

# -----BEGIN PGP SIGNATURE-----
#
# iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmS/2vgPHG1qdEB0bHMu
# bXNrLnJ1AAoJEHAbT2saaT5ZT6MH/j5L3P9yLV6TqW+DkhCppbmBygqxz2SbQjwl
# dVVfSLpJNbtpvLfEnvpb+ms+ZdaOCGj8IofAVf9w0VaIYJFP1srFphY/1x+RYVnw
# kDjCLzuLNSCAdCV2HPqsrMKzdFctZ/MfK+QzfcGik9IvmCNPYWOhpmevs+xAIEJd
# b0xk152zy2fIIC3vKK+3KcM7MFkqZWJ6z0pzUZAyEBS+aQyuZNPJ/cO8xMXotbP2
# jqv12SNGV2GLH1acvsd8GQwDB9MamstB4r8NWpSpT/AyPwOgmMR+j5B8a/WEBJCs
# OcEW/pEyrumSygqf9z01YoNJQUCSvSpg5aq4+S2cRDslmUgFDmw=
# =wCoQ
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 25 Jul 2023 15:23:52 BST
# gpg:                using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg:                issuer "mjt@tls.msk.ru"
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@debian.org>" [full]
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931  4B22 701B 4F6B 1A69 3E59

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
  qapi: Correct "eg." to "e.g." in documentation
  hw/pci: add comment to explain checking for available function 0 in pci hotplug
  target/tricore: Rename tricore_feature
  hw/9pfs: spelling fixes
  other architectures: spelling fixes
  arm: spelling fixes
  s390x: spelling fixes
  migration: spelling fixes

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
  • Loading branch information
pm215 committed Jul 25, 2023
2 parents d59f0c9 + ff62c21 commit 0b58dc4
Show file tree
Hide file tree
Showing 78 changed files with 125 additions and 120 deletions.
2 changes: 1 addition & 1 deletion host/include/aarch64/host/cpuinfo.h
@@ -1,6 +1,6 @@
/*
* SPDX-License-Identifier: GPL-2.0-or-later
* Host specific cpu indentification for AArch64.
* Host specific cpu identification for AArch64.
*/

#ifndef HOST_CPUINFO_H
Expand Down
2 changes: 1 addition & 1 deletion host/include/generic/host/cpuinfo.h
@@ -1,4 +1,4 @@
/*
* No host specific cpu indentification.
* No host specific cpu identification.
* SPDX-License-Identifier: GPL-2.0-or-later
*/
8 changes: 4 additions & 4 deletions hw/9pfs/9p-local.c
Expand Up @@ -624,7 +624,7 @@ static ssize_t local_pwritev(FsContext *ctx, V9fsFidOpenState *fs,
/*
* Initiate a writeback. This is not a data integrity sync.
* We want to ensure that we don't leave dirty pages in the cache
* after write when writeout=immediate is sepcified.
* after write when writeout=immediate is specified.
*/
sync_file_range(fs->fd, offset, ret,
SYNC_FILE_RANGE_WAIT_BEFORE | SYNC_FILE_RANGE_WRITE);
Expand Down Expand Up @@ -843,7 +843,7 @@ static int local_open2(FsContext *fs_ctx, V9fsPath *dir_path, const char *name,
}
credp->fc_mode = credp->fc_mode | S_IFREG;
if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
/* Set cleint credentials in xattr */
/* Set client credentials in xattr */
err = local_set_xattrat(dirfd, name, credp);
} else {
err = local_set_mapped_file_attrat(dirfd, name, credp);
Expand Down Expand Up @@ -912,7 +912,7 @@ static int local_symlink(FsContext *fs_ctx, const char *oldpath,
if (write_size != oldpath_size) {
goto err_end;
}
/* Set cleint credentials in symlink's xattr */
/* Set client credentials in symlink's xattr */
credp->fc_mode = credp->fc_mode | S_IFLNK;

if (fs_ctx->export_flags & V9FS_SM_MAPPED) {
Expand Down Expand Up @@ -1418,7 +1418,7 @@ static int local_ioc_getversion_init(FsContext *ctx, LocalData *data, Error **er
struct statfs stbuf;

/*
* use ioc_getversion only if the ioctl is definied
* use ioc_getversion only if the ioctl is defined
*/
if (fstatfs(data->mountfd, &stbuf) < 0) {
error_setg_errno(errp, errno,
Expand Down
2 changes: 1 addition & 1 deletion hw/9pfs/9p-proxy.c
Expand Up @@ -767,7 +767,7 @@ static ssize_t proxy_pwritev(FsContext *ctx, V9fsFidOpenState *fs,
/*
* Initiate a writeback. This is not a data integrity sync.
* We want to ensure that we don't leave dirty pages in the cache
* after write when writeout=immediate is sepcified.
* after write when writeout=immediate is specified.
*/
sync_file_range(fs->fd, offset, ret,
SYNC_FILE_RANGE_WAIT_BEFORE | SYNC_FILE_RANGE_WRITE);
Expand Down
2 changes: 1 addition & 1 deletion hw/9pfs/9p-synth.c
Expand Up @@ -493,7 +493,7 @@ static int synth_name_to_path(FsContext *ctx, V9fsPath *dir_path,
node = dir_node;
goto out;
}
/* search for the name in the childern */
/* search for the name in the children */
rcu_read_lock();
QLIST_FOREACH(node, &dir_node->child, sibling) {
if (!strcmp(node->name, name)) {
Expand Down
2 changes: 1 addition & 1 deletion hw/9pfs/9p-util.h
Expand Up @@ -48,7 +48,7 @@ static inline uint64_t makedev_dotl(uint32_t dev_major, uint32_t dev_minor)
/*
* Converts given device number from host's device number format to Linux
* device number format. As both the size of type dev_t and encoding of
* dev_t is system dependant, we have to convert them for Linux guests if
* dev_t is system dependent, we have to convert them for Linux guests if
* host is not running Linux.
*/
static inline uint64_t host_dev_to_dotl_dev(dev_t dev)
Expand Down
4 changes: 2 additions & 2 deletions hw/9pfs/9p.c
Expand Up @@ -644,7 +644,7 @@ static inline uint64_t mirror64bit(uint64_t value)
}

/*
* Parameter k for the Exponential Golomb algorihm to be used.
* Parameter k for the Exponential Golomb algorithm to be used.
*
* The smaller this value, the smaller the minimum bit count for the Exp.
* Golomb generated affixes will be (at lowest index) however for the
Expand Down Expand Up @@ -1039,7 +1039,7 @@ static void coroutine_fn pdu_complete(V9fsPDU *pdu, ssize_t len)
* Sending a reply would confuse clients because they would
* assume that any EINTR is the actual result of the operation,
* rather than a consequence of the cancellation. However, if
* the operation completed (succesfully or with an error other
* the operation completed (successfully or with an error other
* than caused be cancellation), we do send out that reply, both
* for efficiency and to avoid confusing the rest of the state machine
* that assumes passing a non-error here will mean a successful
Expand Down
2 changes: 1 addition & 1 deletion hw/9pfs/9p.h
Expand Up @@ -304,7 +304,7 @@ typedef struct VariLenAffix {
AffixType_t type; /* Whether this affix is a suffix or a prefix. */
uint64_t value; /* Actual numerical value of this affix. */
/*
* Lenght of the affix, that is how many (of the lowest) bits of ``value``
* Length of the affix, that is how many (of the lowest) bits of ``value``
* must be used for appending/prepending this affix to its final resulting,
* unique number.
*/
Expand Down
2 changes: 1 addition & 1 deletion hw/arm/aspeed.c
Expand Up @@ -1565,7 +1565,7 @@ static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = &bmc->soc;

/* U10 24C08 connects to SDA/SCL Groupt 1 by default */
/* U10 24C08 connects to SDA/SCL Group 1 by default */
uint8_t *eeprom_buf = g_malloc0(32 * 1024);
smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);

Expand Down
2 changes: 1 addition & 1 deletion hw/arm/mps2-tz.c
Expand Up @@ -1205,7 +1205,7 @@ static void mps2_tz_idau_check(IDAUInterface *ii, uint32_t address,
{
/*
* The MPS2 TZ FPGA images have IDAUs in them which are connected to
* the Master Security Controllers. Thes have the same logic as
* the Master Security Controllers. These have the same logic as
* is used by the IoTKit for the IDAU connected to the CPU, except
* that MSCs don't care about the NSC attribute.
*/
Expand Down
4 changes: 2 additions & 2 deletions hw/intc/arm_gic.c
Expand Up @@ -239,7 +239,7 @@ static inline bool gic_lr_entry_is_free(uint32_t entry)
}

/* Return true if this LR should trigger an EOI maintenance interrupt, i.e. the
* corrsponding bit in EISR is set.
* corresponding bit in EISR is set.
*/
static inline bool gic_lr_entry_is_eoi(uint32_t entry)
{
Expand Down Expand Up @@ -1333,7 +1333,7 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,

/* ??? This currently clears the pending bit for all CPUs, even
for per-CPU interrupts. It's unclear whether this is the
corect behavior. */
correct behavior. */
if (value & (1 << i)) {
GIC_DIST_CLEAR_PENDING(irq + i, ALL_CPU_MASK);
}
Expand Down
2 changes: 1 addition & 1 deletion hw/intc/arm_gicv3_redist.c
Expand Up @@ -494,7 +494,7 @@ static MemTxResult gicr_writel(GICv3CPUState *cs, hwaddr offset,
/* Only the ProcessorSleep bit is writable. When the guest sets
* it, it requests that we transition the channel between the
* redistributor and the cpu interface to quiescent, and that
* we set the ChildrenAsleep bit once the inteface has reached the
* we set the ChildrenAsleep bit once the interface has reached the
* quiescent state.
* Setting the ProcessorSleep to 0 reverses the quiescing, and
* ChildrenAsleep is cleared once the transition is complete.
Expand Down
2 changes: 1 addition & 1 deletion hw/intc/armv7m_nvic.c
Expand Up @@ -894,7 +894,7 @@ int armv7m_nvic_complete_irq(NVICState *s, int irq, bool secure)
vec->active = 0;
if (vec->level) {
/* Re-pend the exception if it's still held high; only
* happens for extenal IRQs
* happens for external IRQs
*/
assert(irq >= NVIC_FIRST_IRQ);
vec->pending = 1;
Expand Down
2 changes: 1 addition & 1 deletion hw/intc/s390_flic_kvm.c
Expand Up @@ -380,7 +380,7 @@ static void kvm_s390_release_adapter_routes(S390FLICState *fs,
* @size: ignored
*
* Note: Pass buf and len to kernel. Start with one page and
* increase until buffer is sufficient or maxium size is
* increase until buffer is sufficient or maximum size is
* reached
*/
static int kvm_flic_save(QEMUFile *f, void *opaque, size_t size,
Expand Down
2 changes: 1 addition & 1 deletion hw/m68k/next-cube.c
Expand Up @@ -734,7 +734,7 @@ static void next_irq(void *opaque, int number, int level)
M68kCPU *cpu = s->cpu;
int shift = 0;

/* first switch sets interupt status */
/* first switch sets interrupt status */
/* DPRINTF("IRQ %i\n",number); */
switch (number) {
/* level 3 - floppy, kbd/mouse, power, ether rx/tx, scsi, clock */
Expand Down
2 changes: 1 addition & 1 deletion hw/m68k/next-kbd.c
Expand Up @@ -37,7 +37,7 @@

OBJECT_DECLARE_SIMPLE_TYPE(NextKBDState, NEXTKBD)

/* following defintions from next68k netbsd */
/* following definitions from next68k netbsd */
#define CSR_INT 0x00800000
#define CSR_DATA 0x00400000

Expand Down
2 changes: 1 addition & 1 deletion hw/m68k/virt.c
@@ -1,7 +1,7 @@
/*
* SPDX-License-Identifier: GPL-2.0-or-later
*
* QEMU Vitual M68K Machine
* QEMU Virtual M68K Machine
*
* (c) 2020 Laurent Vivier <laurent@vivier.eu>
*
Expand Down
2 changes: 1 addition & 1 deletion hw/microblaze/petalogix_ml605_mmu.c
Expand Up @@ -104,7 +104,7 @@ petalogix_ml605_init(MachineState *machine)

dinfo = drive_get(IF_PFLASH, 0, 0);
/* 5th parameter 2 means bank-width
* 10th paremeter 0 means little-endian */
* 10th parameter 0 means little-endian */
pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0);
Expand Down
2 changes: 1 addition & 1 deletion hw/misc/allwinner-r40-dramc.c
Expand Up @@ -368,7 +368,7 @@ static const MemoryRegionOps allwinner_r40_detect_ops = {

/*
* mctl_r40_detect_rank_count in u-boot will write the high 1G of DDR
* to detect wether the board support dual_rank or not. Create a virtual memory
* to detect whether the board support dual_rank or not. Create a virtual memory
* if the board's ram_size less or equal than 1G, and set read time out flag of
* REG_DRAMCTL_PGSR when the user touch this high dram.
*/
Expand Down
2 changes: 1 addition & 1 deletion hw/misc/exynos4210_rng.c
@@ -1,5 +1,5 @@
/*
* Exynos4210 Pseudo Random Nubmer Generator Emulation
* Exynos4210 Pseudo Random Number Generator Emulation
*
* Copyright (c) 2017 Krzysztof Kozlowski <krzk@kernel.org>
*
Expand Down
11 changes: 8 additions & 3 deletions hw/pci/pci.c
Expand Up @@ -1183,9 +1183,14 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev,
PCI_SLOT(devfn), PCI_FUNC(devfn), name,
bus->devices[devfn]->name, bus->devices[devfn]->qdev.id);
return NULL;
} else if (dev->hotplugged &&
!pci_is_vf(pci_dev) &&
pci_get_function_0(pci_dev)) {
} /*
* Populating function 0 triggers a scan from the guest that
* exposes other non-zero functions. Hence we need to ensure that
* function 0 wasn't added yet.
*/
else if (dev->hotplugged &&
!pci_is_vf(pci_dev) &&
pci_get_function_0(pci_dev)) {
error_setg(errp, "PCI: slot %d function 0 already occupied by %s,"
" new func %s cannot be exposed to guest.",
PCI_SLOT(pci_get_function_0(pci_dev)->devfn),
Expand Down
8 changes: 4 additions & 4 deletions hw/sparc/sun4m_iommu.c
Expand Up @@ -96,10 +96,10 @@
#define IOMMU_AER_SBW 0x80000000 /* S-to-M asynchronous writes */
#define IOMMU_AER_MASK 0x801f000f

#define IOMMU_SBCFG0 (0x1010 >> 2) /* SBUS configration per-slot */
#define IOMMU_SBCFG1 (0x1014 >> 2) /* SBUS configration per-slot */
#define IOMMU_SBCFG2 (0x1018 >> 2) /* SBUS configration per-slot */
#define IOMMU_SBCFG3 (0x101c >> 2) /* SBUS configration per-slot */
#define IOMMU_SBCFG0 (0x1010 >> 2) /* SBUS configuration per-slot */
#define IOMMU_SBCFG1 (0x1014 >> 2) /* SBUS configuration per-slot */
#define IOMMU_SBCFG2 (0x1018 >> 2) /* SBUS configuration per-slot */
#define IOMMU_SBCFG3 (0x101c >> 2) /* SBUS configuration per-slot */
#define IOMMU_SBCFG_SAB30 0x00010000 /* Phys-address bit 30 when
bypass enabled */
#define IOMMU_SBCFG_BA16 0x00000004 /* Slave supports 16 byte bursts */
Expand Down
2 changes: 1 addition & 1 deletion include/hw/arm/fsl-imx7.h
Expand Up @@ -165,7 +165,7 @@ enum FslIMX7MemoryMap {
* Some versions of the reference manual claim that UART2 is @
* 0x30870000, but experiments with HW + DT files in upstream
* Linux kernel show that not to be true and that block is
* acutally located @ 0x30890000
* actually located @ 0x30890000
*/
FSL_IMX7_UART2_ADDR = 0x30890000,
FSL_IMX7_UART3_ADDR = 0x30880000,
Expand Down
2 changes: 1 addition & 1 deletion include/hw/intc/armv7m_nvic.h
Expand Up @@ -74,7 +74,7 @@ struct NVICState {
*/
bool vectpending_is_s_banked;
int exception_prio; /* group prio of the highest prio active exception */
int vectpending_prio; /* group prio of the exeception in vectpending */
int vectpending_prio; /* group prio of the exception in vectpending */

MemoryRegion sysregmem;

Expand Down
2 changes: 1 addition & 1 deletion include/hw/s390x/s390-pci-bus.h
Expand Up @@ -184,7 +184,7 @@ enum ZpciIoatDtype {
* The following states make up the "configured" meta-state:
* disabled: device is configured but not enabled; transition between this
* state and enabled via clp enable/disable
* enbaled: device is ready for use; transition to disabled via clp disable;
* enabled: device is ready for use; transition to disabled via clp disable;
* may enter an error state
* blocked: ignore all DMA and interrupts; transition back to enabled or from
* error state via mpcifc
Expand Down
2 changes: 1 addition & 1 deletion include/hw/s390x/sclp.h
Expand Up @@ -87,7 +87,7 @@
* - we work on a private copy of the SCCB, since there are several length
* fields, that would cause a security nightmare if we allow the guest to
* alter the structure while we parse it. We cannot use ldl_p and friends
* either without doing pointer arithmetics
* either without doing pointer arithmetic
* So we have to double check that all users of sclp data structures use the
* right endianness wrappers.
*/
Expand Down
2 changes: 1 addition & 1 deletion migration/migration-stats.c
Expand Up @@ -48,7 +48,7 @@ uint64_t migration_rate_get(void)
void migration_rate_set(uint64_t limit)
{
/*
* 'limit' is per second. But we check it each BUFER_DELAY miliseconds.
* 'limit' is per second. But we check it each BUFFER_DELAY milliseconds.
*/
stat64_set(&mig_stats.rate_limit_max, limit / XFER_LIMIT_RATIO);
}
Expand Down
4 changes: 2 additions & 2 deletions migration/migration.h
Expand Up @@ -134,7 +134,7 @@ struct MigrationIncomingState {
/*
* Always set by the main vm load thread only, but can be read by the
* postcopy preempt thread. "volatile" makes sure all reads will be
* uptodate across cores.
* up-to-date across cores.
*/
volatile PreemptThreadStatus preempt_thread_status;
/*
Expand Down Expand Up @@ -409,7 +409,7 @@ struct MigrationState {
* channel itself.
*
* - postcopy preempt channel will be created at the switching phase
* from precopy -> postcopy (to avoid race condtion of misordered
* from precopy -> postcopy (to avoid race condition of misordered
* creation of channels).
*
* NOTE: See message-id <ZBoShWArKDPpX/D7@work-vm> on qemu-devel
Expand Down
2 changes: 1 addition & 1 deletion migration/multifd-zlib.c
Expand Up @@ -57,7 +57,7 @@ static int zlib_send_setup(MultiFDSendParams *p, Error **errp)
err_msg = "deflate init failed";
goto err_free_z;
}
/* This is the maxium size of the compressed buffer */
/* This is the maximum size of the compressed buffer */
z->zbuff_len = compressBound(MULTIFD_PACKET_SIZE);
z->zbuff = g_try_malloc(z->zbuff_len);
if (!z->zbuff) {
Expand Down
2 changes: 1 addition & 1 deletion migration/multifd-zstd.c
Expand Up @@ -68,7 +68,7 @@ static int zstd_send_setup(MultiFDSendParams *p, Error **errp)
p->id, ZSTD_getErrorName(res));
return -1;
}
/* This is the maxium size of the compressed buffer */
/* This is the maximum size of the compressed buffer */
z->zbuff_len = ZSTD_compressBound(MULTIFD_PACKET_SIZE);
z->zbuff = g_try_malloc(z->zbuff_len);
if (!z->zbuff) {
Expand Down
2 changes: 1 addition & 1 deletion migration/multifd.c
Expand Up @@ -878,7 +878,7 @@ static void multifd_new_send_channel_cleanup(MultiFDSendParams *p,
qemu_sem_post(&p->sem_sync);
/*
* Although multifd_send_thread is not created, but main migration
* thread neet to judge whether it is running, so we need to mark
* thread need to judge whether it is running, so we need to mark
* its status.
*/
p->quit = true;
Expand Down
2 changes: 1 addition & 1 deletion migration/savevm.c
Expand Up @@ -117,7 +117,7 @@ static struct mig_cmd_args {
* The format of arguments is depending on postcopy mode:
* - postcopy RAM only
* uint64_t host page size
* uint64_t taget page size
* uint64_t target page size
*
* - postcopy RAM and postcopy dirty bitmaps
* format is the same as for postcopy RAM only
Expand Down
2 changes: 1 addition & 1 deletion migration/trace-events
Expand Up @@ -184,7 +184,7 @@ source_return_path_thread_shut(uint32_t val) "0x%x"
source_return_path_thread_resume_ack(uint32_t v) "%"PRIu32
source_return_path_thread_switchover_acked(void) ""
migration_thread_low_pending(uint64_t pending) "%" PRIu64
migrate_transferred(uint64_t tranferred, uint64_t time_spent, uint64_t bandwidth, uint64_t size) "transferred %" PRIu64 " time_spent %" PRIu64 " bandwidth %" PRIu64 " max_size %" PRId64
migrate_transferred(uint64_t transferred, uint64_t time_spent, uint64_t bandwidth, uint64_t size) "transferred %" PRIu64 " time_spent %" PRIu64 " bandwidth %" PRIu64 " max_size %" PRId64
process_incoming_migration_co_end(int ret, int ps) "ret=%d postcopy-state=%d"
process_incoming_migration_co_postcopy_end_main(void) ""
postcopy_preempt_enabled(bool value) "%d"
Expand Down
2 changes: 1 addition & 1 deletion qapi/char.json
Expand Up @@ -18,7 +18,7 @@
# @filename: the filename of the character device
#
# @frontend-open: shows whether the frontend device attached to this
# backend (eg. with the chardev=... option) is in open or closed
# backend (e.g. with the chardev=... option) is in open or closed
# state (since 2.1)
#
# Notes: @filename is encoded using the QEMU command line character
Expand Down
2 changes: 1 addition & 1 deletion qapi/misc.json
Expand Up @@ -18,7 +18,7 @@
# fail and the FD will be closed.
#
# @protocol: protocol name. Valid names are "vnc", "spice",
# "@dbus-display" or the name of a character device (eg. from
# "@dbus-display" or the name of a character device (e.g. from
# -chardev id=XXXX)
#
# @fdname: file descriptor name previously passed via 'getfd' command
Expand Down
4 changes: 2 additions & 2 deletions target/alpha/cpu.h
Expand Up @@ -191,7 +191,7 @@ enum {
That said, we're only emulating Unix PALcode, and not attempting VMS,
so we don't need to implement Executive and Supervisor. QEMU's own
PALcode cheats and usees the KSEG mapping for its code+data rather than
PALcode cheats and uses the KSEG mapping for its code+data rather than
physical addresses. */

#define MMU_KERNEL_IDX 0
Expand Down Expand Up @@ -362,7 +362,7 @@ enum {
The Unix PALcode only uses bit 4. */
#define PS_USER_MODE 8u

/* CPUAlphaState->flags constants. These are layed out so that we
/* CPUAlphaState->flags constants. These are laid out so that we
can set or reset the pieces individually by assigning to the byte,
or manipulated as a whole. */

Expand Down

0 comments on commit 0b58dc4

Please sign in to comment.