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target/loongarch: Implement vssrlrn vssrarn 
This patch includes:
- VSSRLRN.{B.H/H.W/W.D};
- VSSRARN.{B.H/H.W/W.D};
- VSSRLRN.{BU.H/HU.W/WU.D};
- VSSRARN.{BU.H/HU.W/WU.D};
- VSSRLRNI.{B.H/H.W/W.D/D.Q};
- VSSRARNI.{B.H/H.W/W.D/D.Q};
- VSSRLRNI.{BU.H/HU.W/WU.D/DU.Q};
- VSSRARNI.{BU.H/HU.W/WU.D/DU.Q}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-29-gaosong@loongson.cn>
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gaosong-loongson committed May 6, 2023
1 parent 83b3815 commit 162cd32
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Showing 5 changed files with 478 additions and 0 deletions.
30 changes: 30 additions & 0 deletions target/loongarch/disas.c
View file
Expand Up @@ -1228,3 +1228,33 @@ INSN_LSX(vssrani_bu_h, vv_i)
INSN_LSX(vssrani_hu_w, vv_i)
INSN_LSX(vssrani_wu_d, vv_i)
INSN_LSX(vssrani_du_q, vv_i)

INSN_LSX(vssrlrn_b_h, vvv)
INSN_LSX(vssrlrn_h_w, vvv)
INSN_LSX(vssrlrn_w_d, vvv)
INSN_LSX(vssrarn_b_h, vvv)
INSN_LSX(vssrarn_h_w, vvv)
INSN_LSX(vssrarn_w_d, vvv)
INSN_LSX(vssrlrn_bu_h, vvv)
INSN_LSX(vssrlrn_hu_w, vvv)
INSN_LSX(vssrlrn_wu_d, vvv)
INSN_LSX(vssrarn_bu_h, vvv)
INSN_LSX(vssrarn_hu_w, vvv)
INSN_LSX(vssrarn_wu_d, vvv)

INSN_LSX(vssrlrni_b_h, vv_i)
INSN_LSX(vssrlrni_h_w, vv_i)
INSN_LSX(vssrlrni_w_d, vv_i)
INSN_LSX(vssrlrni_d_q, vv_i)
INSN_LSX(vssrlrni_bu_h, vv_i)
INSN_LSX(vssrlrni_hu_w, vv_i)
INSN_LSX(vssrlrni_wu_d, vv_i)
INSN_LSX(vssrlrni_du_q, vv_i)
INSN_LSX(vssrarni_b_h, vv_i)
INSN_LSX(vssrarni_h_w, vv_i)
INSN_LSX(vssrarni_w_d, vv_i)
INSN_LSX(vssrarni_d_q, vv_i)
INSN_LSX(vssrarni_bu_h, vv_i)
INSN_LSX(vssrarni_hu_w, vv_i)
INSN_LSX(vssrarni_wu_d, vv_i)
INSN_LSX(vssrarni_du_q, vv_i)
30 changes: 30 additions & 0 deletions target/loongarch/helper.h
View file
Expand Up @@ -441,3 +441,33 @@ DEF_HELPER_4(vssrani_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_du_q, void, env, i32, i32, i32)

DEF_HELPER_4(vssrlrn_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrn_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrn_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarn_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarn_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarn_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrn_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrn_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrn_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarn_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarn_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarn_wu_d, void, env, i32, i32, i32)

DEF_HELPER_4(vssrlrni_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_d_q, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_d_q, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlrni_du_q, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrarni_du_q, void, env, i32, i32, i32)
30 changes: 30 additions & 0 deletions target/loongarch/insn_trans/trans_lsx.c.inc
View file
Expand Up @@ -3067,3 +3067,33 @@ TRANS(vssrani_bu_h, gen_vv_i, gen_helper_vssrani_bu_h)
TRANS(vssrani_hu_w, gen_vv_i, gen_helper_vssrani_hu_w)
TRANS(vssrani_wu_d, gen_vv_i, gen_helper_vssrani_wu_d)
TRANS(vssrani_du_q, gen_vv_i, gen_helper_vssrani_du_q)

TRANS(vssrlrn_b_h, gen_vvv, gen_helper_vssrlrn_b_h)
TRANS(vssrlrn_h_w, gen_vvv, gen_helper_vssrlrn_h_w)
TRANS(vssrlrn_w_d, gen_vvv, gen_helper_vssrlrn_w_d)
TRANS(vssrarn_b_h, gen_vvv, gen_helper_vssrarn_b_h)
TRANS(vssrarn_h_w, gen_vvv, gen_helper_vssrarn_h_w)
TRANS(vssrarn_w_d, gen_vvv, gen_helper_vssrarn_w_d)
TRANS(vssrlrn_bu_h, gen_vvv, gen_helper_vssrlrn_bu_h)
TRANS(vssrlrn_hu_w, gen_vvv, gen_helper_vssrlrn_hu_w)
TRANS(vssrlrn_wu_d, gen_vvv, gen_helper_vssrlrn_wu_d)
TRANS(vssrarn_bu_h, gen_vvv, gen_helper_vssrarn_bu_h)
TRANS(vssrarn_hu_w, gen_vvv, gen_helper_vssrarn_hu_w)
TRANS(vssrarn_wu_d, gen_vvv, gen_helper_vssrarn_wu_d)

TRANS(vssrlrni_b_h, gen_vv_i, gen_helper_vssrlrni_b_h)
TRANS(vssrlrni_h_w, gen_vv_i, gen_helper_vssrlrni_h_w)
TRANS(vssrlrni_w_d, gen_vv_i, gen_helper_vssrlrni_w_d)
TRANS(vssrlrni_d_q, gen_vv_i, gen_helper_vssrlrni_d_q)
TRANS(vssrarni_b_h, gen_vv_i, gen_helper_vssrarni_b_h)
TRANS(vssrarni_h_w, gen_vv_i, gen_helper_vssrarni_h_w)
TRANS(vssrarni_w_d, gen_vv_i, gen_helper_vssrarni_w_d)
TRANS(vssrarni_d_q, gen_vv_i, gen_helper_vssrarni_d_q)
TRANS(vssrlrni_bu_h, gen_vv_i, gen_helper_vssrlrni_bu_h)
TRANS(vssrlrni_hu_w, gen_vv_i, gen_helper_vssrlrni_hu_w)
TRANS(vssrlrni_wu_d, gen_vv_i, gen_helper_vssrlrni_wu_d)
TRANS(vssrlrni_du_q, gen_vv_i, gen_helper_vssrlrni_du_q)
TRANS(vssrarni_bu_h, gen_vv_i, gen_helper_vssrarni_bu_h)
TRANS(vssrarni_hu_w, gen_vv_i, gen_helper_vssrarni_hu_w)
TRANS(vssrarni_wu_d, gen_vv_i, gen_helper_vssrarni_wu_d)
TRANS(vssrarni_du_q, gen_vv_i, gen_helper_vssrarni_du_q)
30 changes: 30 additions & 0 deletions target/loongarch/insns.decode
View file
Expand Up @@ -929,3 +929,33 @@ vssrani_bu_h 0111 00110110 01000 1 .... ..... ..... @vv_ui4
vssrani_hu_w 0111 00110110 01001 ..... ..... ..... @vv_ui5
vssrani_wu_d 0111 00110110 0101 ...... ..... ..... @vv_ui6
vssrani_du_q 0111 00110110 011 ....... ..... ..... @vv_ui7

vssrlrn_b_h 0111 00010000 00001 ..... ..... ..... @vvv
vssrlrn_h_w 0111 00010000 00010 ..... ..... ..... @vvv
vssrlrn_w_d 0111 00010000 00011 ..... ..... ..... @vvv
vssrarn_b_h 0111 00010000 00101 ..... ..... ..... @vvv
vssrarn_h_w 0111 00010000 00110 ..... ..... ..... @vvv
vssrarn_w_d 0111 00010000 00111 ..... ..... ..... @vvv
vssrlrn_bu_h 0111 00010000 10001 ..... ..... ..... @vvv
vssrlrn_hu_w 0111 00010000 10010 ..... ..... ..... @vvv
vssrlrn_wu_d 0111 00010000 10011 ..... ..... ..... @vvv
vssrarn_bu_h 0111 00010000 10101 ..... ..... ..... @vvv
vssrarn_hu_w 0111 00010000 10110 ..... ..... ..... @vvv
vssrarn_wu_d 0111 00010000 10111 ..... ..... ..... @vvv

vssrlrni_b_h 0111 00110101 00000 1 .... ..... ..... @vv_ui4
vssrlrni_h_w 0111 00110101 00001 ..... ..... ..... @vv_ui5
vssrlrni_w_d 0111 00110101 0001 ...... ..... ..... @vv_ui6
vssrlrni_d_q 0111 00110101 001 ....... ..... ..... @vv_ui7
vssrarni_b_h 0111 00110110 10000 1 .... ..... ..... @vv_ui4
vssrarni_h_w 0111 00110110 10001 ..... ..... ..... @vv_ui5
vssrarni_w_d 0111 00110110 1001 ...... ..... ..... @vv_ui6
vssrarni_d_q 0111 00110110 101 ....... ..... ..... @vv_ui7
vssrlrni_bu_h 0111 00110101 01000 1 .... ..... ..... @vv_ui4
vssrlrni_hu_w 0111 00110101 01001 ..... ..... ..... @vv_ui5
vssrlrni_wu_d 0111 00110101 0101 ...... ..... ..... @vv_ui6
vssrlrni_du_q 0111 00110101 011 ....... ..... ..... @vv_ui7
vssrarni_bu_h 0111 00110110 11000 1 .... ..... ..... @vv_ui4
vssrarni_hu_w 0111 00110110 11001 ..... ..... ..... @vv_ui5
vssrarni_wu_d 0111 00110110 1101 ...... ..... ..... @vv_ui6
vssrarni_du_q 0111 00110110 111 ....... ..... ..... @vv_ui7

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