From 1fa79fb02d85c8f2ba9f6f9cabaf1b3ab34b7bcd Mon Sep 17 00:00:00 2001 From: David Brenken Date: Mon, 24 Jun 2019 09:03:35 +0200 Subject: [PATCH] tricore: add FTOIZ instruction Signed-off-by: Andreas Konopik Signed-off-by: David Brenken Signed-off-by: Georg Hofstetter Signed-off-by: Robert Rasche Signed-off-by: Lars Biermanski Reviewed-by: Bastian Koppelmann Message-Id: <20190624070339.4408-2-david.brenken@efs-auto.org> Signed-off-by: Bastian Koppelmann --- target/tricore/fpu_helper.c | 25 +++++++++++++++++++++++++ target/tricore/helper.h | 1 + target/tricore/translate.c | 3 +++ 3 files changed, 29 insertions(+) diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c index d8a6c0d25b59..f079d9e93951 100644 --- a/target/tricore/fpu_helper.c +++ b/target/tricore/fpu_helper.c @@ -303,6 +303,31 @@ uint32_t helper_itof(CPUTriCoreState *env, uint32_t arg) return (uint32_t)f_result; } +uint32_t helper_ftoiz(CPUTriCoreState *env, uint32_t arg) +{ + float32 f_arg = make_float32(arg); + uint32_t result; + int32_t flags; + + result = float32_to_int32_round_to_zero(f_arg, &env->fp_status); + + flags = f_get_excp_flags(env); + if (flags & float_flag_invalid) { + flags &= ~float_flag_inexact; + if (float32_is_any_nan(f_arg)) { + result = 0; + } + } + + if (flags) { + f_update_psw_flags(env, flags); + } else { + env->FPU_FS = 0; + } + + return result; +} + uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg) { float32 f_arg = make_float32(arg); diff --git a/target/tricore/helper.h b/target/tricore/helper.h index f60e81096b54..16b62edf7f2b 100644 --- a/target/tricore/helper.h +++ b/target/tricore/helper.h @@ -111,6 +111,7 @@ DEF_HELPER_4(fmsub, i32, env, i32, i32, i32) DEF_HELPER_3(fcmp, i32, env, i32, i32) DEF_HELPER_2(ftoi, i32, env, i32) DEF_HELPER_2(itof, i32, env, i32) +DEF_HELPER_2(ftoiz, i32, env, i32) DEF_HELPER_2(ftouz, i32, env, i32) DEF_HELPER_2(updfl, void, env, i32) /* dvinit */ diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 06c4485e557f..5e1c4f54b9a2 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -6747,6 +6747,9 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx) case OPC2_32_RR_UPDFL: gen_helper_updfl(cpu_env, cpu_gpr_d[r1]); break; + case OPC2_32_RR_FTOIZ: + gen_helper_ftoiz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]); + break; default: generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); }