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target/riscv: Use aesenc_SB_SR_MC_AK
This implements the AES64ESM instruction.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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rth7680 committed Jul 9, 2023
1 parent 607a5f9 commit 274f337
Showing 1 changed file with 6 additions and 1 deletion.
7 changes: 6 additions & 1 deletion target/riscv/crypto_helper.c
Expand Up @@ -198,7 +198,12 @@ static inline target_ulong aes64_operation(target_ulong rs1, target_ulong rs2,

target_ulong HELPER(aes64esm)(target_ulong rs1, target_ulong rs2)
{
return aes64_operation(rs1, rs2, true, true);
AESState t;

t.d[HOST_BIG_ENDIAN] = rs1;
t.d[!HOST_BIG_ENDIAN] = rs2;
aesenc_SB_SR_MC_AK(&t, &t, &aes_zero, false);
return t.d[HOST_BIG_ENDIAN];
}

target_ulong HELPER(aes64es)(target_ulong rs1, target_ulong rs2)
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