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target/riscv: Refactor some of the generic vector functionality
Take some functions/macros out of `vector_helper` and put them in a new module called `vector_internals`. This ensures they can be used by both vector and vector-crypto helpers (latter implemented in proceeding commits). Signed-off-by: Kiran Ostrolenk <kiran.ostrolenk@codethink.co.uk> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Max Chou <max.chou@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230711165917.2629866-2-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,81 @@ | ||
| /* | ||
| * RISC-V Vector Extension Internals | ||
| * | ||
| * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved. | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify it | ||
| * under the terms and conditions of the GNU General Public License, | ||
| * version 2 or later, as published by the Free Software Foundation. | ||
| * | ||
| * This program is distributed in the hope it will be useful, but WITHOUT | ||
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| * more details. | ||
| * | ||
| * You should have received a copy of the GNU General Public License along with | ||
| * this program. If not, see <http://www.gnu.org/licenses/>. | ||
| */ | ||
|
|
||
| #include "vector_internals.h" | ||
|
|
||
| /* set agnostic elements to 1s */ | ||
| void vext_set_elems_1s(void *base, uint32_t is_agnostic, uint32_t cnt, | ||
| uint32_t tot) | ||
| { | ||
| if (is_agnostic == 0) { | ||
| /* policy undisturbed */ | ||
| return; | ||
| } | ||
| if (tot - cnt == 0) { | ||
| return ; | ||
| } | ||
| memset(base + cnt, -1, tot - cnt); | ||
| } | ||
|
|
||
| void do_vext_vv(void *vd, void *v0, void *vs1, void *vs2, | ||
| CPURISCVState *env, uint32_t desc, | ||
| opivv2_fn *fn, uint32_t esz) | ||
| { | ||
| uint32_t vm = vext_vm(desc); | ||
| uint32_t vl = env->vl; | ||
| uint32_t total_elems = vext_get_total_elems(env, desc, esz); | ||
| uint32_t vta = vext_vta(desc); | ||
| uint32_t vma = vext_vma(desc); | ||
| uint32_t i; | ||
|
|
||
| for (i = env->vstart; i < vl; i++) { | ||
| if (!vm && !vext_elem_mask(v0, i)) { | ||
| /* set masked-off elements to 1s */ | ||
| vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); | ||
| continue; | ||
| } | ||
| fn(vd, vs1, vs2, i); | ||
| } | ||
| env->vstart = 0; | ||
| /* set tail elements to 1s */ | ||
| vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); | ||
| } | ||
|
|
||
| void do_vext_vx(void *vd, void *v0, target_long s1, void *vs2, | ||
| CPURISCVState *env, uint32_t desc, | ||
| opivx2_fn fn, uint32_t esz) | ||
| { | ||
| uint32_t vm = vext_vm(desc); | ||
| uint32_t vl = env->vl; | ||
| uint32_t total_elems = vext_get_total_elems(env, desc, esz); | ||
| uint32_t vta = vext_vta(desc); | ||
| uint32_t vma = vext_vma(desc); | ||
| uint32_t i; | ||
|
|
||
| for (i = env->vstart; i < vl; i++) { | ||
| if (!vm && !vext_elem_mask(v0, i)) { | ||
| /* set masked-off elements to 1s */ | ||
| vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz); | ||
| continue; | ||
| } | ||
| fn(vd, s1, vs2, i); | ||
| } | ||
| env->vstart = 0; | ||
| /* set tail elements to 1s */ | ||
| vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); | ||
| } |
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