From 69242e7e7ea55f2a3f4fa50e367cad849c9cdc36 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Mar 2022 19:57:39 +0400 Subject: [PATCH] Move CPU softfloat unions to cpu-float.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The types are no longer used in bswap.h since commit f930224fffe ("bswap.h: Remove unused float-access functions"), there isn't much sense in keeping it there and having a dependency on fpu/. Signed-off-by: Marc-André Lureau Message-Id: <20220323155743.1585078-29-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini --- include/qemu/bswap.h | 60 ------------------------------------ include/qemu/cpu-float.h | 64 +++++++++++++++++++++++++++++++++++++++ migration/vmstate-types.c | 1 + target/alpha/cpu.h | 1 + target/arm/cpu.h | 1 + target/hppa/cpu.h | 1 + target/i386/cpu.h | 1 + target/m68k/cpu.h | 1 + target/microblaze/cpu.h | 2 +- target/openrisc/cpu.h | 1 + target/ppc/cpu.h | 1 + target/riscv/cpu.h | 2 +- target/rx/cpu.h | 1 + target/s390x/cpu.h | 1 + target/sh4/cpu.h | 1 + target/sparc/cpu.h | 1 + target/tricore/cpu.h | 1 + target/xtensa/cpu.h | 1 + 18 files changed, 80 insertions(+), 62 deletions(-) create mode 100644 include/qemu/cpu-float.h diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 9dff7c7dbbc9..346d05f2aab3 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -19,8 +19,6 @@ extern "C" { #endif -#include "fpu/softfloat-types.h" - #ifdef BSWAP_FROM_BYTESWAP static inline uint16_t bswap16(uint16_t x) { @@ -202,64 +200,6 @@ CPU_CONVERT(le, 64, uint64_t) # define const_le16(_x) (_x) #endif -/* Unions for reinterpreting between floats and integers. */ - -typedef union { - float32 f; - uint32_t l; -} CPU_FloatU; - -typedef union { - float64 d; -#if HOST_BIG_ENDIAN - struct { - uint32_t upper; - uint32_t lower; - } l; -#else - struct { - uint32_t lower; - uint32_t upper; - } l; -#endif - uint64_t ll; -} CPU_DoubleU; - -typedef union { - floatx80 d; - struct { - uint64_t lower; - uint16_t upper; - } l; -} CPU_LDoubleU; - -typedef union { - float128 q; -#if HOST_BIG_ENDIAN - struct { - uint32_t upmost; - uint32_t upper; - uint32_t lower; - uint32_t lowest; - } l; - struct { - uint64_t upper; - uint64_t lower; - } ll; -#else - struct { - uint32_t lowest; - uint32_t lower; - uint32_t upper; - uint32_t upmost; - } l; - struct { - uint64_t lower; - uint64_t upper; - } ll; -#endif -} CPU_QuadU; - /* unaligned/endian-independent pointer access */ /* diff --git a/include/qemu/cpu-float.h b/include/qemu/cpu-float.h new file mode 100644 index 000000000000..911099499ffb --- /dev/null +++ b/include/qemu/cpu-float.h @@ -0,0 +1,64 @@ +#ifndef QEMU_CPU_FLOAT_H_ +#define QEMU_CPU_FLOAT_H_ + +#include "fpu/softfloat-types.h" + +/* Unions for reinterpreting between floats and integers. */ + +typedef union { + float32 f; + uint32_t l; +} CPU_FloatU; + +typedef union { + float64 d; +#if HOST_BIG_ENDIAN + struct { + uint32_t upper; + uint32_t lower; + } l; +#else + struct { + uint32_t lower; + uint32_t upper; + } l; +#endif + uint64_t ll; +} CPU_DoubleU; + +typedef union { + floatx80 d; + struct { + uint64_t lower; + uint16_t upper; + } l; +} CPU_LDoubleU; + +typedef union { + float128 q; +#if HOST_BIG_ENDIAN + struct { + uint32_t upmost; + uint32_t upper; + uint32_t lower; + uint32_t lowest; + } l; + struct { + uint64_t upper; + uint64_t lower; + } ll; +#else + struct { + uint32_t lowest; + uint32_t lower; + uint32_t upper; + uint32_t upmost; + } l; + struct { + uint64_t lower; + uint64_t upper; + } ll; +#endif +} CPU_QuadU; + +#endif /* QEMU_CPU_FLOAT_H_ */ diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c index bf4d440308ea..e83bfccb9ecf 100644 --- a/migration/vmstate-types.c +++ b/migration/vmstate-types.c @@ -11,6 +11,7 @@ */ #include "qemu/osdep.h" +#include "qemu/cpu-float.h" #include "qemu-file.h" #include "migration.h" #include "migration/vmstate.h" diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 58f00b7814fd..994a018b910d 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -22,6 +22,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" /* Alpha processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index ccf635ac5cbc..cb5359a74702 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -21,6 +21,7 @@ #define ARM_CPU_H #include "kvm-consts.h" +#include "qemu/cpu-float.h" #include "hw/registerfields.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 4cc936b6bfda..c43b93a68f14 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -22,6 +22,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" /* PA-RISC 1.x processors have a strong memory model. */ /* ??? While we do not yet implement PA-RISC 2.0, those processors have diff --git a/target/i386/cpu.h b/target/i386/cpu.h index ccf627d2c53b..8422f6c18e7a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -25,6 +25,7 @@ #include "kvm/hyperv-proto.h" #include "exec/cpu-defs.h" #include "qapi/qapi-types-common.h" +#include "qemu/cpu-float.h" /* The x86 has a strong memory model with some store-after-load re-ordering */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 872e8ce63758..9b3bf7a44819 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -22,6 +22,7 @@ #define M68K_CPU_H #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" #include "cpu-qom.h" #define OS_BYTE 0 diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 0a0ce71b6a5c..67aa88b8db5b 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -22,7 +22,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat-types.h" +#include "qemu/cpu-float.h" typedef struct CPUArchState CPUMBState; #if !defined(CONFIG_USER_ONLY) diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index bdf29d2dc4c3..b9584f10d452 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -21,6 +21,7 @@ #define OPENRISC_CPU_H #include "exec/cpu-defs.h" +#include "fpu/softfloat-types.h" #include "hw/core/cpu.h" #include "qom/object.h" diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 627e574127ba..473436a49eb5 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -21,6 +21,7 @@ #define PPC_CPU_H #include "qemu/int128.h" +#include "qemu/cpu-float.h" #include "exec/cpu-defs.h" #include "cpu-qom.h" #include "qom/object.h" diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index c069fe85fa1b..e1d976bdef06 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -23,7 +23,7 @@ #include "hw/core/cpu.h" #include "hw/registerfields.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat-types.h" +#include "qemu/cpu-float.h" #include "qom/object.h" #include "qemu/int128.h" #include "cpu_bits.h" diff --git a/target/rx/cpu.h b/target/rx/cpu.h index b4abd90ccd1e..1c267f83bfd2 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -24,6 +24,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" /* PSW define */ REG32(PSW, 0) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index c49c8466e74d..7d6d01325b2d 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -28,6 +28,7 @@ #include "cpu-qom.h" #include "cpu_models.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" #define ELF_MACHINE_UNAME "S390X" diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index c72a30edfd41..14d490ac4705 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -22,6 +22,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" /* CPU Subtypes */ #define SH_CPU_SH7750 (1 << 0) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index abb38db6749d..dd9e2f5cdb6a 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -4,6 +4,7 @@ #include "qemu/bswap.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" #if !defined(TARGET_SPARC64) #define TARGET_DPREGS 16 diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 108d6b8288fb..3b9c533a7c3b 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -22,6 +22,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qemu/cpu-float.h" #include "tricore-defs.h" struct tricore_boot_info; diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index f10cfabdc35c..71142ea8f453 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -29,6 +29,7 @@ #define XTENSA_CPU_H #include "cpu-qom.h" +#include "qemu/cpu-float.h" #include "exec/cpu-defs.h" #include "xtensa-isa.h"