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Merge tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu … 
…into staging

* Fix emulated LCCB, LOCFHR, MXDB and MXDBR s390x instructions
* Fix the malta machine on s390x (big endian) hosts
* Emulate /proc/cpuinfo on s390x
* Remove pointless QOM casts
* Improve the inclusion logic for libkeyutils and ipmi-bt-test in meson.build

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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 05 Jun 2023 10:53:12 PM PDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [unknown]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [unknown]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu:
  linux-user: Emulate /proc/cpuinfo on s390x
  linux-user/elfload: Introduce elf_hwcap_str() on s390x
  linux-user/elfload: Expose get_elf_hwcap() on s390x
  s390x/tcg: Fix CPU address returned by STIDP
  bulk: Remove pointless QOM casts
  scripts: Add qom-cast-macro-clean-cocci-gen.py
  hw/mips/malta: Fix the malta machine on big endian hosts
  gitlab-ci: Remove unused Python package
  tests/qtest: Run ipmi-bt-test only if CONFIG_IPMI_EXTERN is set
  tests/tcg/s390x: Test MXDB and MXDBR
  target/s390x: Fix MXDB and MXDBR
  Add conditional dependency for libkeyutils
  tests/tcg/s390x: Test single-stepping SVC
  linux-user/s390x: Fix single-stepping SVC
  tests/tcg/s390x: Test LOCFHR
  target/s390x: Fix LOCFHR taking the wrong half of R2
  tests/tcg/s390x: Test LCBB
  target/s390x: Fix LCBB overwriting the top 32 bits

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@rth7680
rth7680 committed Jun 6, 2023
2 parents 369081c + 1fb9bda commit 7ce5a15
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Showing 46 changed files with 480 additions and 76 deletions.
1 change: 0 additions & 1 deletion .gitlab-ci.d/container-template.yml
View file
Expand Up @@ -7,7 +7,6 @@
before_script:
- export TAG="$CI_REGISTRY_IMAGE/qemu/$NAME:latest"
- export COMMON_TAG="$CI_REGISTRY/qemu-project/qemu/qemu/$NAME:latest"
- apk add python3
- docker login $CI_REGISTRY -u "$CI_REGISTRY_USER" -p "$CI_REGISTRY_PASSWORD"
- until docker info; do sleep 1; done
script:
Expand Down
1 change: 1 addition & 0 deletions MAINTAINERS
View file
Expand Up @@ -3046,6 +3046,7 @@ F: include/qom/
F: qapi/qom.json
F: qapi/qdev.json
F: scripts/coccinelle/qom-parent-type.cocci
F: scripts/qom-cast-macro-clean-cocci-gen.py
F: softmmu/qdev-monitor.c
F: stubs/qdev.c
F: qom/
Expand Down
4 changes: 2 additions & 2 deletions block/nbd.c
View file
Expand Up @@ -397,7 +397,7 @@ static void coroutine_fn GRAPH_RDLOCK nbd_reconnect_attempt(BDRVNBDState *s)

/* Finalize previous connection if any */
if (s->ioc) {
qio_channel_detach_aio_context(QIO_CHANNEL(s->ioc));
qio_channel_detach_aio_context(s->ioc);
yank_unregister_function(BLOCKDEV_YANK_INSTANCE(s->bs->node_name),
nbd_yank, s->bs);
object_unref(OBJECT(s->ioc));
Expand Down Expand Up @@ -1455,7 +1455,7 @@ static void nbd_yank(void *opaque)
BDRVNBDState *s = (BDRVNBDState *)bs->opaque;

QEMU_LOCK_GUARD(&s->requests_lock);
qio_channel_shutdown(QIO_CHANNEL(s->ioc), QIO_CHANNEL_SHUTDOWN_BOTH, NULL);
qio_channel_shutdown(s->ioc, QIO_CHANNEL_SHUTDOWN_BOTH, NULL);
s->state = NBD_CLIENT_QUIT;
}

Expand Down
2 changes: 1 addition & 1 deletion chardev/char-pty.c
View file
Expand Up @@ -334,7 +334,7 @@ static void char_pty_open(Chardev *chr,
s = PTY_CHARDEV(chr);
s->ioc = QIO_CHANNEL(qio_channel_file_new_fd(master_fd));
name = g_strdup_printf("chardev-pty-%s", chr->label);
qio_channel_set_name(QIO_CHANNEL(s->ioc), name);
qio_channel_set_name(s->ioc, name);
g_free(name);
s->timer_src = NULL;
*be_opened = false;
Expand Down
2 changes: 1 addition & 1 deletion hw/arm/musicpal.c
View file
Expand Up @@ -1250,7 +1250,7 @@ static void musicpal_init(MachineState *machine)
uart_orgate = DEVICE(object_new(TYPE_OR_IRQ));
object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal);
qdev_realize_and_unref(uart_orgate, NULL, &error_fatal);
qdev_connect_gpio_out(DEVICE(uart_orgate), 0,
qdev_connect_gpio_out(uart_orgate, 0,
qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ));

serial_mm_init(address_space_mem, MP_UART1_BASE, 2,
Expand Down
2 changes: 1 addition & 1 deletion hw/arm/xlnx-versal.c
View file
Expand Up @@ -327,7 +327,7 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)
object_initialize_child(OBJECT(s), "rtc", &s->pmc.rtc,
TYPE_XLNX_ZYNQMP_RTC);
sbd = SYS_BUS_DEVICE(&s->pmc.rtc);
sysbus_realize(SYS_BUS_DEVICE(sbd), &error_fatal);
sysbus_realize(sbd, &error_fatal);

mr = sysbus_mmio_get_region(sbd, 0);
memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr);
Expand Down
4 changes: 2 additions & 2 deletions hw/display/vhost-user-gpu.c
View file
Expand Up @@ -364,11 +364,11 @@ vhost_user_gpu_gl_flushed(VirtIOGPUBase *b)
VhostUserGPU *g = VHOST_USER_GPU(b);

if (g->backend_blocked) {
vhost_user_gpu_unblock(VHOST_USER_GPU(g));
vhost_user_gpu_unblock(g);
g->backend_blocked = false;
}

vhost_user_gpu_update_blocked(VHOST_USER_GPU(g), false);
vhost_user_gpu_update_blocked(g, false);
}

static bool
Expand Down
6 changes: 3 additions & 3 deletions hw/intc/loongarch_extioi.c
View file
Expand Up @@ -276,22 +276,22 @@ static void loongarch_extioi_instance_init(Object *obj)
int i, cpu, pin;

for (i = 0; i < EXTIOI_IRQS; i++) {
sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq[i]);
sysbus_init_irq(dev, &s->irq[i]);
}

qdev_init_gpio_in(DEVICE(obj), extioi_setirq, EXTIOI_IRQS);

for (cpu = 0; cpu < EXTIOI_CPUS; cpu++) {
memory_region_init_io(&s->extioi_iocsr_mem[cpu], OBJECT(s), &extioi_ops,
s, "extioi_iocsr", 0x900);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_iocsr_mem[cpu]);
sysbus_init_mmio(dev, &s->extioi_iocsr_mem[cpu]);
for (pin = 0; pin < LS3A_INTC_IP; pin++) {
qdev_init_gpio_out(DEVICE(obj), &s->parent_irq[cpu][pin], 1);
}
}
memory_region_init_io(&s->extioi_system_mem, OBJECT(s), &extioi_ops,
s, "extioi_system_mem", 0x900);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_system_mem);
sysbus_init_mmio(dev, &s->extioi_system_mem);
}

static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
Expand Down
2 changes: 1 addition & 1 deletion hw/m68k/q800.c
View file
Expand Up @@ -525,7 +525,7 @@ static void q800_init(MachineState *machine)
qdev_realize_and_unref(escc_orgate, NULL, &error_fatal);
sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0));
sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1));
qdev_connect_gpio_out(DEVICE(escc_orgate), 0,
qdev_connect_gpio_out(escc_orgate, 0,
qdev_get_gpio_in(glue, GLUE_IRQ_IN_ESCC));
sysbus_mmio_map(sysbus, 0, SCC_BASE);

Expand Down
4 changes: 2 additions & 2 deletions hw/mips/malta.c
View file
Expand Up @@ -629,9 +629,9 @@ static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr,

/* Bus endianess is always reversed */
#if TARGET_BIG_ENDIAN
#define cpu_to_gt32 cpu_to_le32
#define cpu_to_gt32(x) (x)
#else
#define cpu_to_gt32 cpu_to_be32
#define cpu_to_gt32(x) bswap32(x)
#endif

/* setup MEM-to-PCI0 mapping as done by YAMON */
Expand Down
2 changes: 1 addition & 1 deletion hw/pci-host/bonito.c
View file
Expand Up @@ -656,7 +656,7 @@ static void bonito_pci_realize(PCIDevice *dev, Error **errp)
PCIBonitoState *s = PCI_BONITO(dev);
SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
BonitoState *bs = s->pcihost;
MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);

/*
Expand Down
2 changes: 1 addition & 1 deletion hw/ppc/pnv_lpc.c
View file
Expand Up @@ -744,7 +744,7 @@ static void pnv_lpc_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(&lpc->opb_mr, LPC_HC_REGS_OPB_ADDR,
&lpc->lpc_hc_regs);

qdev_init_gpio_out(DEVICE(dev), &lpc->psi_irq, 1);
qdev_init_gpio_out(dev, &lpc->psi_irq, 1);
}

static void pnv_lpc_class_init(ObjectClass *klass, void *data)
Expand Down
2 changes: 1 addition & 1 deletion hw/ppc/pnv_occ.c
View file
Expand Up @@ -278,7 +278,7 @@ static void pnv_occ_realize(DeviceState *dev, Error **errp)
occ, "occ-common-area",
PNV_OCC_SENSOR_DATA_BLOCK_SIZE);

qdev_init_gpio_out(DEVICE(dev), &occ->psi_irq, 1);
qdev_init_gpio_out(dev, &occ->psi_irq, 1);
}

static void pnv_occ_class_init(ObjectClass *klass, void *data)
Expand Down
2 changes: 1 addition & 1 deletion hw/ppc/pnv_sbe.c
View file
Expand Up @@ -381,7 +381,7 @@ static void pnv_sbe_realize(DeviceState *dev, Error **errp)
psc->xscom_mbox_ops, sbe, "xscom-sbe-mbox",
psc->xscom_mbox_size);

qdev_init_gpio_out(DEVICE(dev), &sbe->psi_irq, 1);
qdev_init_gpio_out(dev, &sbe->psi_irq, 1);

sbe->timer = timer_new_us(QEMU_CLOCK_VIRTUAL, sbe_timer, sbe);
}
Expand Down
10 changes: 5 additions & 5 deletions hw/riscv/virt.c
View file
Expand Up @@ -1488,7 +1488,7 @@ static void virt_machine_init(MachineState *machine)
for (i = 0; i < VIRTIO_COUNT; i++) {
sysbus_create_simple("virtio-mmio",
memmap[VIRT_VIRTIO].base + i * memmap[VIRT_VIRTIO].size,
qdev_get_gpio_in(DEVICE(virtio_irqchip), VIRTIO_IRQ + i));
qdev_get_gpio_in(virtio_irqchip, VIRTIO_IRQ + i));
}

gpex_pcie_init(system_memory,
Expand All @@ -1499,16 +1499,16 @@ static void virt_machine_init(MachineState *machine)
virt_high_pcie_memmap.base,
virt_high_pcie_memmap.size,
memmap[VIRT_PCIE_PIO].base,
DEVICE(pcie_irqchip));
pcie_irqchip);

create_platform_bus(s, DEVICE(mmio_irqchip));
create_platform_bus(s, mmio_irqchip);

serial_mm_init(system_memory, memmap[VIRT_UART0].base,
0, qdev_get_gpio_in(DEVICE(mmio_irqchip), UART0_IRQ), 399193,
0, qdev_get_gpio_in(mmio_irqchip, UART0_IRQ), 399193,
serial_hd(0), DEVICE_LITTLE_ENDIAN);

sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base,
qdev_get_gpio_in(DEVICE(mmio_irqchip), RTC_IRQ));
qdev_get_gpio_in(mmio_irqchip, RTC_IRQ));

virt_flash_create(s);

Expand Down
2 changes: 1 addition & 1 deletion hw/rx/rx62n.c
View file
Expand Up @@ -154,7 +154,7 @@ static void register_icu(RX62NState *s)
sysbus_connect_irq(icu, 0, qdev_get_gpio_in(DEVICE(&s->cpu), RX_CPU_IRQ));
sysbus_connect_irq(icu, 1, qdev_get_gpio_in(DEVICE(&s->cpu), RX_CPU_FIR));
sysbus_connect_irq(icu, 2, s->irq[SWI]);
sysbus_mmio_map(SYS_BUS_DEVICE(icu), 0, RX62N_ICU_BASE);
sysbus_mmio_map(icu, 0, RX62N_ICU_BASE);
}

static void register_tmr(RX62NState *s, int unit)
Expand Down
18 changes: 9 additions & 9 deletions hw/scsi/esp-pci.c
View file
Expand Up @@ -79,7 +79,7 @@ struct PCIESPState {

static void esp_pci_handle_idle(PCIESPState *pci, uint32_t val)
{
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;

trace_esp_pci_dma_idle(val);
esp_dma_enable(s, 0, 0);
Expand All @@ -93,7 +93,7 @@ static void esp_pci_handle_blast(PCIESPState *pci, uint32_t val)

static void esp_pci_handle_abort(PCIESPState *pci, uint32_t val)
{
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;

trace_esp_pci_dma_abort(val);
if (s->current_req) {
Expand All @@ -103,7 +103,7 @@ static void esp_pci_handle_abort(PCIESPState *pci, uint32_t val)

static void esp_pci_handle_start(PCIESPState *pci, uint32_t val)
{
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;

trace_esp_pci_dma_start(val);

Expand Down Expand Up @@ -161,7 +161,7 @@ static void esp_pci_dma_write(PCIESPState *pci, uint32_t saddr, uint32_t val)

static uint32_t esp_pci_dma_read(PCIESPState *pci, uint32_t saddr)
{
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;
uint32_t val;

val = pci->dma_regs[saddr];
Expand All @@ -183,7 +183,7 @@ static void esp_pci_io_write(void *opaque, hwaddr addr,
uint64_t val, unsigned int size)
{
PCIESPState *pci = opaque;
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;

if (size < 4 || addr & 3) {
/* need to upgrade request: we only support 4-bytes accesses */
Expand Down Expand Up @@ -228,7 +228,7 @@ static uint64_t esp_pci_io_read(void *opaque, hwaddr addr,
unsigned int size)
{
PCIESPState *pci = opaque;
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;
uint32_t ret;

if (addr < 0x40) {
Expand Down Expand Up @@ -315,7 +315,7 @@ static const MemoryRegionOps esp_pci_io_ops = {
static void esp_pci_hard_reset(DeviceState *dev)
{
PCIESPState *pci = PCI_ESP(dev);
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;

esp_hard_reset(s);
pci->dma_regs[DMA_CMD] &= ~(DMA_CMD_DIR | DMA_CMD_INTE_D | DMA_CMD_INTE_P
Expand Down Expand Up @@ -366,7 +366,7 @@ static void esp_pci_scsi_realize(PCIDevice *dev, Error **errp)
{
PCIESPState *pci = PCI_ESP(dev);
DeviceState *d = DEVICE(dev);
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;
uint8_t *pci_conf;

if (!qdev_realize(DEVICE(s), NULL, errp)) {
Expand Down Expand Up @@ -394,7 +394,7 @@ static void esp_pci_scsi_realize(PCIDevice *dev, Error **errp)
static void esp_pci_scsi_exit(PCIDevice *d)
{
PCIESPState *pci = PCI_ESP(d);
ESPState *s = ESP(&pci->esp);
ESPState *s = &pci->esp;

qemu_free_irq(s->irq);
}
Expand Down
4 changes: 2 additions & 2 deletions hw/sparc/sun4m.c
View file
Expand Up @@ -982,7 +982,7 @@ static void sun4m_hw_init(MachineState *machine)
qdev_realize_and_unref(ms_kb_orgate, NULL, &error_fatal);
sysbus_connect_irq(s, 0, qdev_get_gpio_in(ms_kb_orgate, 0));
sysbus_connect_irq(s, 1, qdev_get_gpio_in(ms_kb_orgate, 1));
qdev_connect_gpio_out(DEVICE(ms_kb_orgate), 0, slavio_irq[14]);
qdev_connect_gpio_out(ms_kb_orgate, 0, slavio_irq[14]);

dev = qdev_new(TYPE_ESCC);
qdev_prop_set_uint32(dev, "disabled", 0);
Expand All @@ -1004,7 +1004,7 @@ static void sun4m_hw_init(MachineState *machine)
qdev_realize_and_unref(serial_orgate, NULL, &error_fatal);
sysbus_connect_irq(s, 0, qdev_get_gpio_in(serial_orgate, 0));
sysbus_connect_irq(s, 1, qdev_get_gpio_in(serial_orgate, 1));
qdev_connect_gpio_out(DEVICE(serial_orgate), 0, slavio_irq[15]);
qdev_connect_gpio_out(serial_orgate, 0, slavio_irq[15]);

if (hwdef->apc_base) {
apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0));
Expand Down
6 changes: 3 additions & 3 deletions hw/virtio/virtio-mem-pci.c
View file
Expand Up @@ -42,7 +42,7 @@ static MemoryRegion *virtio_mem_pci_get_memory_region(MemoryDeviceState *md,
Error **errp)
{
VirtIOMEMPCI *pci_mem = VIRTIO_MEM_PCI(md);
VirtIOMEM *vmem = VIRTIO_MEM(&pci_mem->vdev);
VirtIOMEM *vmem = &pci_mem->vdev;
VirtIOMEMClass *vmc = VIRTIO_MEM_GET_CLASS(vmem);

return vmc->get_memory_region(vmem, errp);
Expand All @@ -60,7 +60,7 @@ static void virtio_mem_pci_fill_device_info(const MemoryDeviceState *md,
{
VirtioMEMDeviceInfo *vi = g_new0(VirtioMEMDeviceInfo, 1);
VirtIOMEMPCI *pci_mem = VIRTIO_MEM_PCI(md);
VirtIOMEM *vmem = VIRTIO_MEM(&pci_mem->vdev);
VirtIOMEM *vmem = &pci_mem->vdev;
VirtIOMEMClass *vpc = VIRTIO_MEM_GET_CLASS(vmem);
DeviceState *dev = DEVICE(md);

Expand Down Expand Up @@ -123,7 +123,7 @@ static void virtio_mem_pci_instance_init(Object *obj)
TYPE_VIRTIO_MEM);

dev->size_change_notifier.notify = virtio_mem_pci_size_change_notify;
vmem = VIRTIO_MEM(&dev->vdev);
vmem = &dev->vdev;
vmc = VIRTIO_MEM_GET_CLASS(vmem);
/*
* We never remove the notifier again, as we expect both devices to
Expand Down
6 changes: 3 additions & 3 deletions hw/virtio/virtio-pmem-pci.c
View file
Expand Up @@ -42,7 +42,7 @@ static MemoryRegion *virtio_pmem_pci_get_memory_region(MemoryDeviceState *md,
Error **errp)
{
VirtIOPMEMPCI *pci_pmem = VIRTIO_PMEM_PCI(md);
VirtIOPMEM *pmem = VIRTIO_PMEM(&pci_pmem->vdev);
VirtIOPMEM *pmem = &pci_pmem->vdev;
VirtIOPMEMClass *vpc = VIRTIO_PMEM_GET_CLASS(pmem);

return vpc->get_memory_region(pmem, errp);
Expand All @@ -52,7 +52,7 @@ static uint64_t virtio_pmem_pci_get_plugged_size(const MemoryDeviceState *md,
Error **errp)
{
VirtIOPMEMPCI *pci_pmem = VIRTIO_PMEM_PCI(md);
VirtIOPMEM *pmem = VIRTIO_PMEM(&pci_pmem->vdev);
VirtIOPMEM *pmem = &pci_pmem->vdev;
VirtIOPMEMClass *vpc = VIRTIO_PMEM_GET_CLASS(pmem);
MemoryRegion *mr = vpc->get_memory_region(pmem, errp);

Expand All @@ -65,7 +65,7 @@ static void virtio_pmem_pci_fill_device_info(const MemoryDeviceState *md,
{
VirtioPMEMDeviceInfo *vi = g_new0(VirtioPMEMDeviceInfo, 1);
VirtIOPMEMPCI *pci_pmem = VIRTIO_PMEM_PCI(md);
VirtIOPMEM *pmem = VIRTIO_PMEM(&pci_pmem->vdev);
VirtIOPMEM *pmem = &pci_pmem->vdev;
VirtIOPMEMClass *vpc = VIRTIO_PMEM_GET_CLASS(pmem);
DeviceState *dev = DEVICE(md);

Expand Down
29 changes: 28 additions & 1 deletion linux-user/elfload.c
View file
Expand Up @@ -1583,7 +1583,7 @@ static inline void init_thread(struct target_pt_regs *regs,
#define GET_FEATURE(_feat, _hwcap) \
do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)

static uint32_t get_elf_hwcap(void)
uint32_t get_elf_hwcap(void)
{
/*
* Let's assume we always have esan3 and zarch.
Expand All @@ -1605,6 +1605,33 @@ static uint32_t get_elf_hwcap(void)
return hwcap;
}

const char *elf_hwcap_str(uint32_t bit)
{
static const char *hwcap_str[] = {
[HWCAP_S390_ESAN3] = "esan3",
[HWCAP_S390_ZARCH] = "zarch",
[HWCAP_S390_STFLE] = "stfle",
[HWCAP_S390_MSA] = "msa",
[HWCAP_S390_LDISP] = "ldisp",
[HWCAP_S390_EIMM] = "eimm",
[HWCAP_S390_DFP] = "dfp",
[HWCAP_S390_HPAGE] = "edat",
[HWCAP_S390_ETF3EH] = "etf3eh",
[HWCAP_S390_HIGH_GPRS] = "highgprs",
[HWCAP_S390_TE] = "te",
[HWCAP_S390_VXRS] = "vx",
[HWCAP_S390_VXRS_BCD] = "vxd",
[HWCAP_S390_VXRS_EXT] = "vxe",
[HWCAP_S390_GS] = "gs",
[HWCAP_S390_VXRS_EXT2] = "vxe2",
[HWCAP_S390_VXRS_PDE] = "vxp",
[HWCAP_S390_SORT] = "sort",
[HWCAP_S390_DFLT] = "dflt",
};

return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
}

static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
{
regs->psw.addr = infop->entry;
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