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target/loongarch: Implement vssrln vssran
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This patch includes:
- VSSRLN.{B.H/H.W/W.D};
- VSSRAN.{B.H/H.W/W.D};
- VSSRLN.{BU.H/HU.W/WU.D};
- VSSRAN.{BU.H/HU.W/WU.D};
- VSSRLNI.{B.H/H.W/W.D/D.Q};
- VSSRANI.{B.H/H.W/W.D/D.Q};
- VSSRLNI.{BU.H/HU.W/WU.D/DU.Q};
- VSSRANI.{BU.H/HU.W/WU.D/DU.Q}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-28-gaosong@loongson.cn>
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gaosong-loongson committed May 6, 2023
1 parent a5200a1 commit 83b3815
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Showing 5 changed files with 499 additions and 0 deletions.
30 changes: 30 additions & 0 deletions target/loongarch/disas.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1198,3 +1198,33 @@ INSN_LSX(vsrarni_b_h, vv_i)
INSN_LSX(vsrarni_h_w, vv_i)
INSN_LSX(vsrarni_w_d, vv_i)
INSN_LSX(vsrarni_d_q, vv_i)

INSN_LSX(vssrln_b_h, vvv)
INSN_LSX(vssrln_h_w, vvv)
INSN_LSX(vssrln_w_d, vvv)
INSN_LSX(vssran_b_h, vvv)
INSN_LSX(vssran_h_w, vvv)
INSN_LSX(vssran_w_d, vvv)
INSN_LSX(vssrln_bu_h, vvv)
INSN_LSX(vssrln_hu_w, vvv)
INSN_LSX(vssrln_wu_d, vvv)
INSN_LSX(vssran_bu_h, vvv)
INSN_LSX(vssran_hu_w, vvv)
INSN_LSX(vssran_wu_d, vvv)

INSN_LSX(vssrlni_b_h, vv_i)
INSN_LSX(vssrlni_h_w, vv_i)
INSN_LSX(vssrlni_w_d, vv_i)
INSN_LSX(vssrlni_d_q, vv_i)
INSN_LSX(vssrani_b_h, vv_i)
INSN_LSX(vssrani_h_w, vv_i)
INSN_LSX(vssrani_w_d, vv_i)
INSN_LSX(vssrani_d_q, vv_i)
INSN_LSX(vssrlni_bu_h, vv_i)
INSN_LSX(vssrlni_hu_w, vv_i)
INSN_LSX(vssrlni_wu_d, vv_i)
INSN_LSX(vssrlni_du_q, vv_i)
INSN_LSX(vssrani_bu_h, vv_i)
INSN_LSX(vssrani_hu_w, vv_i)
INSN_LSX(vssrani_wu_d, vv_i)
INSN_LSX(vssrani_du_q, vv_i)
30 changes: 30 additions & 0 deletions target/loongarch/helper.h
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Original file line number Diff line number Diff line change
Expand Up @@ -411,3 +411,33 @@ DEF_HELPER_4(vsrarni_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vsrarni_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vsrarni_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vsrarni_d_q, void, env, i32, i32, i32)

DEF_HELPER_4(vssrln_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrln_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrln_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssran_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssran_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssran_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrln_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrln_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrln_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssran_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssran_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssran_wu_d, void, env, i32, i32, i32)

DEF_HELPER_4(vssrlni_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_d_q, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_b_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_h_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_w_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_d_q, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrlni_du_q, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_bu_h, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_hu_w, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_wu_d, void, env, i32, i32, i32)
DEF_HELPER_4(vssrani_du_q, void, env, i32, i32, i32)
30 changes: 30 additions & 0 deletions target/loongarch/insn_trans/trans_lsx.c.inc
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Original file line number Diff line number Diff line change
Expand Up @@ -3037,3 +3037,33 @@ TRANS(vsrarni_b_h, gen_vv_i, gen_helper_vsrarni_b_h)
TRANS(vsrarni_h_w, gen_vv_i, gen_helper_vsrarni_h_w)
TRANS(vsrarni_w_d, gen_vv_i, gen_helper_vsrarni_w_d)
TRANS(vsrarni_d_q, gen_vv_i, gen_helper_vsrarni_d_q)

TRANS(vssrln_b_h, gen_vvv, gen_helper_vssrln_b_h)
TRANS(vssrln_h_w, gen_vvv, gen_helper_vssrln_h_w)
TRANS(vssrln_w_d, gen_vvv, gen_helper_vssrln_w_d)
TRANS(vssran_b_h, gen_vvv, gen_helper_vssran_b_h)
TRANS(vssran_h_w, gen_vvv, gen_helper_vssran_h_w)
TRANS(vssran_w_d, gen_vvv, gen_helper_vssran_w_d)
TRANS(vssrln_bu_h, gen_vvv, gen_helper_vssrln_bu_h)
TRANS(vssrln_hu_w, gen_vvv, gen_helper_vssrln_hu_w)
TRANS(vssrln_wu_d, gen_vvv, gen_helper_vssrln_wu_d)
TRANS(vssran_bu_h, gen_vvv, gen_helper_vssran_bu_h)
TRANS(vssran_hu_w, gen_vvv, gen_helper_vssran_hu_w)
TRANS(vssran_wu_d, gen_vvv, gen_helper_vssran_wu_d)

TRANS(vssrlni_b_h, gen_vv_i, gen_helper_vssrlni_b_h)
TRANS(vssrlni_h_w, gen_vv_i, gen_helper_vssrlni_h_w)
TRANS(vssrlni_w_d, gen_vv_i, gen_helper_vssrlni_w_d)
TRANS(vssrlni_d_q, gen_vv_i, gen_helper_vssrlni_d_q)
TRANS(vssrani_b_h, gen_vv_i, gen_helper_vssrani_b_h)
TRANS(vssrani_h_w, gen_vv_i, gen_helper_vssrani_h_w)
TRANS(vssrani_w_d, gen_vv_i, gen_helper_vssrani_w_d)
TRANS(vssrani_d_q, gen_vv_i, gen_helper_vssrani_d_q)
TRANS(vssrlni_bu_h, gen_vv_i, gen_helper_vssrlni_bu_h)
TRANS(vssrlni_hu_w, gen_vv_i, gen_helper_vssrlni_hu_w)
TRANS(vssrlni_wu_d, gen_vv_i, gen_helper_vssrlni_wu_d)
TRANS(vssrlni_du_q, gen_vv_i, gen_helper_vssrlni_du_q)
TRANS(vssrani_bu_h, gen_vv_i, gen_helper_vssrani_bu_h)
TRANS(vssrani_hu_w, gen_vv_i, gen_helper_vssrani_hu_w)
TRANS(vssrani_wu_d, gen_vv_i, gen_helper_vssrani_wu_d)
TRANS(vssrani_du_q, gen_vv_i, gen_helper_vssrani_du_q)
30 changes: 30 additions & 0 deletions target/loongarch/insns.decode
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Original file line number Diff line number Diff line change
Expand Up @@ -899,3 +899,33 @@ vsrarni_b_h 0111 00110101 11000 1 .... ..... ..... @vv_ui4
vsrarni_h_w 0111 00110101 11001 ..... ..... ..... @vv_ui5
vsrarni_w_d 0111 00110101 1101 ...... ..... ..... @vv_ui6
vsrarni_d_q 0111 00110101 111 ....... ..... ..... @vv_ui7

vssrln_b_h 0111 00001111 11001 ..... ..... ..... @vvv
vssrln_h_w 0111 00001111 11010 ..... ..... ..... @vvv
vssrln_w_d 0111 00001111 11011 ..... ..... ..... @vvv
vssran_b_h 0111 00001111 11101 ..... ..... ..... @vvv
vssran_h_w 0111 00001111 11110 ..... ..... ..... @vvv
vssran_w_d 0111 00001111 11111 ..... ..... ..... @vvv
vssrln_bu_h 0111 00010000 01001 ..... ..... ..... @vvv
vssrln_hu_w 0111 00010000 01010 ..... ..... ..... @vvv
vssrln_wu_d 0111 00010000 01011 ..... ..... ..... @vvv
vssran_bu_h 0111 00010000 01101 ..... ..... ..... @vvv
vssran_hu_w 0111 00010000 01110 ..... ..... ..... @vvv
vssran_wu_d 0111 00010000 01111 ..... ..... ..... @vvv

vssrlni_b_h 0111 00110100 10000 1 .... ..... ..... @vv_ui4
vssrlni_h_w 0111 00110100 10001 ..... ..... ..... @vv_ui5
vssrlni_w_d 0111 00110100 1001 ...... ..... ..... @vv_ui6
vssrlni_d_q 0111 00110100 101 ....... ..... ..... @vv_ui7
vssrani_b_h 0111 00110110 00000 1 .... ..... ..... @vv_ui4
vssrani_h_w 0111 00110110 00001 ..... ..... ..... @vv_ui5
vssrani_w_d 0111 00110110 0001 ...... ..... ..... @vv_ui6
vssrani_d_q 0111 00110110 001 ....... ..... ..... @vv_ui7
vssrlni_bu_h 0111 00110100 11000 1 .... ..... ..... @vv_ui4
vssrlni_hu_w 0111 00110100 11001 ..... ..... ..... @vv_ui5
vssrlni_wu_d 0111 00110100 1101 ...... ..... ..... @vv_ui6
vssrlni_du_q 0111 00110100 111 ....... ..... ..... @vv_ui7
vssrani_bu_h 0111 00110110 01000 1 .... ..... ..... @vv_ui4
vssrani_hu_w 0111 00110110 01001 ..... ..... ..... @vv_ui5
vssrani_wu_d 0111 00110110 0101 ...... ..... ..... @vv_ui6
vssrani_du_q 0111 00110110 011 ....... ..... ..... @vv_ui7

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