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hw/sh4: Coding style: Add missing braces
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Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <b53a8cbcf57207fbd6408db1007b3e82008d60f7.1635541329.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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zbalaton authored and philmd committed Oct 30, 2021
1 parent f94bff1 commit ac3c9e7
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Showing 6 changed files with 118 additions and 81 deletions.
48 changes: 32 additions & 16 deletions hw/char/sh_serial.c
Expand Up @@ -103,8 +103,9 @@ static void sh_serial_write(void *opaque, hwaddr offs,
case 0x08: /* SCR */
/* TODO : For SH7751, SCIF mask should be 0xfb. */
s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff);
if (!(val & (1 << 5)))
if (!(val & (1 << 5))) {
s->flags |= SH_SERIAL_FLAG_TEND;
}
if ((s->feat & SH_SERIAL_FEAT_SCIF) && s->txi) {
qemu_set_irq(s->txi, val & (1 << 7));
}
Expand Down Expand Up @@ -133,16 +134,21 @@ static void sh_serial_write(void *opaque, hwaddr offs,
if (s->feat & SH_SERIAL_FEAT_SCIF) {
switch (offs) {
case 0x10: /* FSR */
if (!(val & (1 << 6)))
if (!(val & (1 << 6))) {
s->flags &= ~SH_SERIAL_FLAG_TEND;
if (!(val & (1 << 5)))
}
if (!(val & (1 << 5))) {
s->flags &= ~SH_SERIAL_FLAG_TDE;
if (!(val & (1 << 4)))
}
if (!(val & (1 << 4))) {
s->flags &= ~SH_SERIAL_FLAG_BRK;
if (!(val & (1 << 1)))
}
if (!(val & (1 << 1))) {
s->flags &= ~SH_SERIAL_FLAG_RDF;
if (!(val & (1 << 0)))
}
if (!(val & (1 << 0))) {
s->flags &= ~SH_SERIAL_FLAG_DR;
}

if (!(val & (1 << 1)) || !(val & (1 << 0))) {
if (s->rxi) {
Expand Down Expand Up @@ -231,29 +237,37 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs,
break;
case 0x10: /* FSR */
ret = 0;
if (s->flags & SH_SERIAL_FLAG_TEND)
if (s->flags & SH_SERIAL_FLAG_TEND) {
ret |= (1 << 6);
if (s->flags & SH_SERIAL_FLAG_TDE)
}
if (s->flags & SH_SERIAL_FLAG_TDE) {
ret |= (1 << 5);
if (s->flags & SH_SERIAL_FLAG_BRK)
}
if (s->flags & SH_SERIAL_FLAG_BRK) {
ret |= (1 << 4);
if (s->flags & SH_SERIAL_FLAG_RDF)
}
if (s->flags & SH_SERIAL_FLAG_RDF) {
ret |= (1 << 1);
if (s->flags & SH_SERIAL_FLAG_DR)
}
if (s->flags & SH_SERIAL_FLAG_DR) {
ret |= (1 << 0);
}

if (s->scr & (1 << 5))
if (s->scr & (1 << 5)) {
s->flags |= SH_SERIAL_FLAG_TDE | SH_SERIAL_FLAG_TEND;
}

break;
case 0x14:
if (s->rx_cnt > 0) {
ret = s->rx_fifo[s->rx_tail++];
s->rx_cnt--;
if (s->rx_tail == SH_RX_FIFO_LENGTH)
if (s->rx_tail == SH_RX_FIFO_LENGTH) {
s->rx_tail = 0;
if (s->rx_cnt < s->rtrg)
}
if (s->rx_cnt < s->rtrg) {
s->flags &= ~SH_SERIAL_FLAG_RDF;
}
}
break;
case 0x18:
Expand Down Expand Up @@ -308,8 +322,9 @@ static int sh_serial_can_receive(sh_serial_state *s)

static void sh_serial_receive_break(sh_serial_state *s)
{
if (s->feat & SH_SERIAL_FEAT_SCIF)
if (s->feat & SH_SERIAL_FEAT_SCIF) {
s->sr |= (1 << 4);
}
}

static int sh_serial_can_receive1(void *opaque)
Expand Down Expand Up @@ -361,8 +376,9 @@ static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size)
static void sh_serial_event(void *opaque, QEMUChrEvent event)
{
sh_serial_state *s = opaque;
if (event == CHR_EVENT_BREAK)
if (event == CHR_EVENT_BREAK) {
sh_serial_receive_break(s);
}
}

static const MemoryRegionOps sh_serial_ops = {
Expand Down
87 changes: 47 additions & 40 deletions hw/intc/sh_intc.c
Expand Up @@ -26,23 +26,23 @@ void sh_intc_toggle_source(struct intc_source *source,
int pending_changed = 0;
int old_pending;

if ((source->enable_count == source->enable_max) && (enable_adj == -1))
if ((source->enable_count == source->enable_max) && (enable_adj == -1)) {
enable_changed = -1;

}
source->enable_count += enable_adj;

if (source->enable_count == source->enable_max)
if (source->enable_count == source->enable_max) {
enable_changed = 1;

}
source->asserted += assert_adj;

old_pending = source->pending;
source->pending = source->asserted &&
(source->enable_count == source->enable_max);

if (old_pending != source->pending)
if (old_pending != source->pending) {
pending_changed = 1;

}
if (pending_changed) {
if (source->pending) {
source->parent->pending++;
Expand Down Expand Up @@ -79,10 +79,11 @@ static void sh_intc_set_irq(void *opaque, int n, int level)
struct intc_desc *desc = opaque;
struct intc_source *source = &(desc->sources[n]);

if (level && !source->asserted)
sh_intc_toggle_source(source, 0, 1);
else if (!level && source->asserted)
sh_intc_toggle_source(source, 0, -1);
if (level && !source->asserted) {
sh_intc_toggle_source(source, 0, 1);
} else if (!level && source->asserted) {
sh_intc_toggle_source(source, 0, -1);
}
}

int sh_intc_get_pending_vector(struct intc_desc *desc, int imask)
Expand Down Expand Up @@ -126,16 +127,18 @@ static unsigned int sh_intc_mode(unsigned long address,
return INTC_MODE_NONE;

if (set_reg && clr_reg) {
if (address == INTC_A7(set_reg))
if (address == INTC_A7(set_reg)) {
return INTC_MODE_DUAL_SET;
else
} else {
return INTC_MODE_DUAL_CLR;
}
}

if (set_reg)
if (set_reg) {
return INTC_MODE_ENABLE_REG;
else
} else {
return INTC_MODE_MASK_REG;
}
}

static void sh_intc_locate(struct intc_desc *desc,
Expand All @@ -155,9 +158,9 @@ static void sh_intc_locate(struct intc_desc *desc,
struct intc_mask_reg *mr = desc->mask_regs + i;

mode = sh_intc_mode(address, mr->set_reg, mr->clr_reg);
if (mode == INTC_MODE_NONE)
if (mode == INTC_MODE_NONE) {
continue;

}
*modep = mode;
*datap = &mr->value;
*enums = mr->enum_ids;
Expand All @@ -172,9 +175,9 @@ static void sh_intc_locate(struct intc_desc *desc,
struct intc_prio_reg *pr = desc->prio_regs + i;

mode = sh_intc_mode(address, pr->set_reg, pr->clr_reg);
if (mode == INTC_MODE_NONE)
if (mode == INTC_MODE_NONE) {
continue;

}
*modep = mode | INTC_MODE_IS_PRIO;
*datap = &pr->value;
*enums = pr->enum_ids;
Expand All @@ -192,19 +195,19 @@ static void sh_intc_toggle_mask(struct intc_desc *desc, intc_enum id,
{
struct intc_source *source = desc->sources + id;

if (!id)
if (!id) {
return;

}
if (!source->next_enum_id && (!source->enable_max || !source->vect)) {
#ifdef DEBUG_INTC_SOURCES
printf("sh_intc: reserved interrupt source %d modified\n", id);
#endif
return;
}

if (source->vect)
if (source->vect) {
sh_intc_toggle_source(source, enable ? 1 : -1, 0);

}
#ifdef DEBUG_INTC
else {
printf("setting interrupt group %d to %d\n", id, !!enable);
Expand Down Expand Up @@ -276,8 +279,9 @@ static void sh_intc_write(void *opaque, hwaddr offset,
for (k = 0; k <= first; k++) {
mask = ((1 << width) - 1) << ((first - k) * width);

if ((*valuep & mask) == (value & mask))
if ((*valuep & mask) == (value & mask)) {
continue;
}
#if 0
printf("k = %d, first = %d, enum = %d, mask = 0x%08x\n",
k, first, enum_ids[k], (unsigned int)mask);
Expand All @@ -300,9 +304,9 @@ static const MemoryRegionOps sh_intc_ops = {

struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id)
{
if (id)
if (id) {
return desc->sources + id;

}
return NULL;
}

Expand Down Expand Up @@ -351,12 +355,13 @@ static void sh_intc_register_source(struct intc_desc *desc,
struct intc_mask_reg *mr = desc->mask_regs + i;

for (k = 0; k < ARRAY_SIZE(mr->enum_ids); k++) {
if (mr->enum_ids[k] != source)
if (mr->enum_ids[k] != source) {
continue;

}
s = sh_intc_source(desc, mr->enum_ids[k]);
if (s)
if (s) {
s->enable_max++;
}
}
}
}
Expand All @@ -366,12 +371,13 @@ static void sh_intc_register_source(struct intc_desc *desc,
struct intc_prio_reg *pr = desc->prio_regs + i;

for (k = 0; k < ARRAY_SIZE(pr->enum_ids); k++) {
if (pr->enum_ids[k] != source)
if (pr->enum_ids[k] != source) {
continue;

}
s = sh_intc_source(desc, pr->enum_ids[k]);
if (s)
if (s) {
s->enable_max++;
}
}
}
}
Expand All @@ -381,12 +387,13 @@ static void sh_intc_register_source(struct intc_desc *desc,
struct intc_group *gr = groups + i;

for (k = 0; k < ARRAY_SIZE(gr->enum_ids); k++) {
if (gr->enum_ids[k] != source)
if (gr->enum_ids[k] != source) {
continue;

}
s = sh_intc_source(desc, gr->enum_ids[k]);
if (s)
if (s) {
s->enable_max++;
}
}
}
}
Expand Down Expand Up @@ -425,9 +432,9 @@ void sh_intc_register_sources(struct intc_desc *desc,
s->next_enum_id = gr->enum_ids[0];

for (k = 1; k < ARRAY_SIZE(gr->enum_ids); k++) {
if (!gr->enum_ids[k])
if (!gr->enum_ids[k]) {
continue;

}
s = sh_intc_source(desc, gr->enum_ids[k - 1]);
s->next_enum_id = gr->enum_ids[k];
}
Expand Down Expand Up @@ -512,11 +519,11 @@ void sh_intc_set_irl(void *opaque, int n, int level)
struct intc_source *s = opaque;
int i, irl = level ^ 15;
for (i = 0; (s = sh_intc_source(s->parent, s->next_enum_id)); i++) {
if (i == irl)
if (i == irl) {
sh_intc_toggle_source(s, s->enable_count ? 0 : 1,
s->asserted ? 0 : 1);
else
if (s->asserted)
sh_intc_toggle_source(s, 0, -1);
} else if (s->asserted) {
sh_intc_toggle_source(s, 0, -1);
}
}
}
15 changes: 9 additions & 6 deletions hw/sh4/r2d.c
Expand Up @@ -114,20 +114,23 @@ static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = {
static void update_irl(r2d_fpga_t *fpga)
{
int i, irl = 15;
for (i = 0; i < NR_IRQS; i++)
if (fpga->irlmon & fpga->irlmsk & irqtab[i].msk)
if (irqtab[i].irl < irl)
irl = irqtab[i].irl;
for (i = 0; i < NR_IRQS; i++) {
if ((fpga->irlmon & fpga->irlmsk & irqtab[i].msk) &&
irqtab[i].irl < irl) {
irl = irqtab[i].irl;
}
}
qemu_set_irq(fpga->irl, irl ^ 15);
}

static void r2d_fpga_irq_set(void *opaque, int n, int level)
{
r2d_fpga_t *fpga = opaque;
if (level)
if (level) {
fpga->irlmon |= irqtab[n].msk;
else
} else {
fpga->irlmon &= ~irqtab[n].msk;
}
update_irl(fpga);
}

Expand Down

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