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Hexagon (target/hexagon/*.py): raise exception on reg parsing error 
Currently, the python scripts used for the hexagon building will not
abort the compilation when there is an error parsing a register. Let's
make the compilation properly fail in such cases by rasing an exception
instead of just printing a warning message, which might get lost in the
output.

This patch was generated with:

 git grep -l "Bad register" *hexagon* | \
 xargs sed -i "" -e 's/print("Bad register parse: "[, ]*\([^)]*\))/hex_common.bad_register(\1)/g'

Plus the bad_register() helper added to hex_common.py.

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <1f5dbd92f68fdd89e2647e4ba527a2c32cf0f070.1683217043.git.quic_mathbern@quicinc.com>
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@quic-mathbern @taylorsimpson
quic-mathbern authored and taylorsimpson committed May 18, 2023
1 parent 4354f3d commit c319939
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Showing 6 changed files with 66 additions and 63 deletions.
30 changes: 15 additions & 15 deletions target/hexagon/gen_analyze_funcs.py
View file
Expand Up @@ -47,7 +47,7 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_reg_write(ctx, {regN}, {predicated});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "P":
if regid in {"s", "t", "u", "v"}:
f.write(f" const int {regN} = insn->regno[{regno}];\n")
Expand All @@ -56,7 +56,7 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_pred_write(ctx, {regN});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "C":
if regid == "ss":
f.write(
Expand All @@ -77,13 +77,13 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
f.write(f" const int {regN} = insn->regno[{regno}] " "+ HEX_REG_SA0;\n")
f.write(f" ctx_log_reg_write(ctx, {regN}, {predicated});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "M":
if regid == "u":
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_reg_read(ctx, {regN});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "V":
newv = "EXT_DFL"
if hex_common.is_new_result(tag):
Expand All @@ -105,7 +105,7 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_vreg_write(ctx, {regN}, {newv}, " f"{predicated});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "Q":
if regid in {"d", "e", "x"}:
f.write(f" const int {regN} = insn->regno[{regno}];\n")
Expand All @@ -114,7 +114,7 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_qreg_read(ctx, {regN});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "G":
if regid in {"dd"}:
f.write(f"// const int {regN} = insn->regno[{regno}];\n")
Expand All @@ -125,7 +125,7 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
elif regid in {"s"}:
f.write(f"// const int {regN} = insn->regno[{regno}];\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "S":
if regid in {"dd"}:
f.write(f"// const int {regN} = insn->regno[{regno}];\n")
Expand All @@ -136,9 +136,9 @@ def analyze_opn_old(f, tag, regtype, regid, regno):
elif regid in {"s"}:
f.write(f"// const int {regN} = insn->regno[{regno}];\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)


def analyze_opn_new(f, tag, regtype, regid, regno):
Expand All @@ -148,21 +148,21 @@ def analyze_opn_new(f, tag, regtype, regid, regno):
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_reg_read(ctx, {regN});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "P":
if regid in {"t", "u", "v"}:
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_pred_read(ctx, {regN});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
elif regtype == "O":
if regid == "s":
f.write(f" const int {regN} = insn->regno[{regno}];\n")
f.write(f" ctx_log_vreg_read(ctx, {regN});\n")
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)
else:
print("Bad register parse: ", regtype, regid)
hex_common.bad_register(regtype, regid)


def analyze_opn(f, tag, regtype, regid, toss, numregs, i):
Expand All @@ -174,9 +174,9 @@ def analyze_opn(f, tag, regtype, regid, toss, numregs, i):
elif hex_common.is_new_val(regtype, regid, tag):
analyze_opn_new(f, tag, regtype, regid, i)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)


##
Expand Down
14 changes: 7 additions & 7 deletions target/hexagon/gen_helper_funcs.py
View file
Expand Up @@ -87,9 +87,9 @@ def gen_helper_arg_opn(f, regtype, regid, i, tag):
elif hex_common.is_new_val(regtype, regid, tag):
gen_helper_arg_new(f, regtype, regid, i)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)


def gen_helper_arg_imm(f, immlett):
Expand Down Expand Up @@ -135,7 +135,7 @@ def gen_helper_dest_decl_opn(f, regtype, regid, i):
else:
gen_helper_dest_decl(f, regtype, regid, i)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)


def gen_helper_src_var_ext(f, regtype, regid):
Expand Down Expand Up @@ -185,7 +185,7 @@ def gen_helper_return_opn(f, regtype, regid, i):
else:
gen_helper_return(f, regtype, regid, i)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)


##
Expand Down Expand Up @@ -239,7 +239,7 @@ def gen_helper_function(f, tag, tagregs, tagimms):
else:
gen_helper_return_type(f, regtype, regid, i)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)
i += 1

if numscalarresults == 0:
Expand All @@ -262,7 +262,7 @@ def gen_helper_function(f, tag, tagregs, tagimms):
# This is the return value of the function
continue
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)
i += 1

## For conditional instructions, we pass in the destination register
Expand Down Expand Up @@ -329,7 +329,7 @@ def gen_helper_function(f, tag, tagregs, tagimms):
if hex_common.is_hvx_reg(regtype):
gen_helper_src_var_ext(f, regtype, regid)
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)

if hex_common.need_slot(tag):
if "A_LOAD" in hex_common.attribdict[tag]:
Expand Down
2 changes: 1 addition & 1 deletion target/hexagon/gen_helper_protos.py
View file
Expand Up @@ -52,7 +52,7 @@ def gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i):
elif hex_common.is_single(regid):
f.write(f", {def_helper_types[regtype]}")
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)


##
Expand Down
2 changes: 1 addition & 1 deletion target/hexagon/gen_idef_parser_funcs.py
View file
Expand Up @@ -147,7 +147,7 @@ def main():
elif is_single_new:
arguments.append(f"{prefix}{regtype}{regid}N")
else:
print("Bad register parse: ", regtype, regid, toss, numregs)
hex_common.bad_register(regtype, regid, toss, numregs)

for immlett, bits, immshift in imms:
arguments.append(hex_common.imm_name(immlett))
Expand Down

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