From d108609bf9ba160d2e2044ce7d553f691ac96dbd Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 24 Mar 2014 15:59:02 +0000 Subject: [PATCH] target-arm: Fix A64 Neon MLS The order of operands for the accumulate step in disas_simd_3same_int() was reversed. This only affected the MLS instruction, since all the other accumulating instructions in this category perform an addition rather than a subtraction. Reported-by: Laurent Desnogues Tested-by: Laurent Desnogues Signed-off-by: Peter Maydell --- target-arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 9f0645075e05..9175e48797f6 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -8925,7 +8925,7 @@ static void disas_simd_3same_int(DisasContext *s, uint32_t insn) genfn = fns[size][is_sub]; read_vec_element_i32(s, tcg_op1, rd, pass, MO_32); - genfn(tcg_res, tcg_res, tcg_op1); + genfn(tcg_res, tcg_op1, tcg_res); } write_vec_element_i32(s, tcg_res, rd, pass, MO_32);