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Merge tag 'pull-loongarch-20230616' of https://gitlab.com/gaosong/qemu … 
…into staging

pull-loongarch-20230616

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* tag 'pull-loongarch-20230616' of https://gitlab.com/gaosong/qemu:
  target/loongarch: Fix CSR.DMW0-3.VSEG check
  hw/loongarch: Supplement cpu topology arguments
  hw/loongarch: Add numa support
  hw/intc: Set physical cpuid route for LoongArch ipi device
  hw/loongarch/virt: Add cpu arch_id support

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@rth7680
rth7680 committed Jun 16, 2023
2 parents 0d7c8da + 505aa8d commit e3660cc
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Showing 6 changed files with 235 additions and 38 deletions.
44 changes: 37 additions & 7 deletions hw/intc/loongarch_ipi.c
View file
Expand Up @@ -17,6 +17,8 @@
#include "target/loongarch/internals.h"
#include "trace.h"

static void loongarch_ipi_writel(void *, hwaddr, uint64_t, unsigned);

static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size)
{
IPICore *s = opaque;
Expand Down Expand Up @@ -75,13 +77,42 @@ static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr)
data, MEMTXATTRS_UNSPECIFIED, NULL);
}

static int archid_cmp(const void *a, const void *b)
{
CPUArchId *archid_a = (CPUArchId *)a;
CPUArchId *archid_b = (CPUArchId *)b;

return archid_a->arch_id - archid_b->arch_id;
}

static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id)
{
CPUArchId apic_id, *found_cpu;

apic_id.arch_id = id;
found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus),
archid_cmp);

return found_cpu;
}

static CPUState *ipi_getcpu(int arch_id)
{
MachineState *machine = MACHINE(qdev_get_machine());
CPUArchId *archid;

archid = find_cpu_by_archid(machine, arch_id);
return CPU(archid->cpu);
}

static void ipi_send(uint64_t val)
{
uint32_t cpuid;
uint8_t vector;
CPULoongArchState *env;
CPUState *cs;
LoongArchCPU *cpu;
LoongArchIPI *s;

cpuid = extract32(val, 16, 10);
if (cpuid >= LOONGARCH_MAX_CPUS) {
Expand All @@ -92,11 +123,10 @@ static void ipi_send(uint64_t val)
/* IPI status vector */
vector = extract8(val, 0, 5);

cs = qemu_get_cpu(cpuid);
cs = ipi_getcpu(cpuid);
cpu = LOONGARCH_CPU(cs);
env = &cpu->env;
address_space_stl(&env->address_space_iocsr, 0x1008,
BIT(vector), MEMTXATTRS_UNSPECIFIED, NULL);
s = LOONGARCH_IPI(cpu->env.ipistate);
loongarch_ipi_writel(&s->ipi_core, CORE_SET_OFF, BIT(vector), 4);
}

static void mail_send(uint64_t val)
Expand All @@ -114,7 +144,7 @@ static void mail_send(uint64_t val)
}

addr = 0x1020 + (val & 0x1c);
cs = qemu_get_cpu(cpuid);
cs = ipi_getcpu(cpuid);
cpu = LOONGARCH_CPU(cs);
env = &cpu->env;
send_ipi_data(env, val, addr);
Expand All @@ -135,7 +165,7 @@ static void any_send(uint64_t val)
}

addr = val & 0xffff;
cs = qemu_get_cpu(cpuid);
cs = ipi_getcpu(cpuid);
cpu = LOONGARCH_CPU(cs);
env = &cpu->env;
send_ipi_data(env, val, addr);
Expand Down
1 change: 1 addition & 0 deletions hw/loongarch/Kconfig
View file
Expand Up @@ -21,3 +21,4 @@ config LOONGARCH_VIRT
select FW_CFG_DMA
select DIMM
select PFLASH_CFI01
select ACPI_HMAT
78 changes: 63 additions & 15 deletions hw/loongarch/acpi-build.c
View file
Expand Up @@ -34,6 +34,7 @@
#include "sysemu/tpm.h"
#include "hw/platform-bus.h"
#include "hw/acpi/aml-build.h"
#include "hw/acpi/hmat.h"

#define ACPI_BUILD_ALIGN_SIZE 0x1000
#define ACPI_BUILD_TABLE_SIZE 0x20000
Expand Down Expand Up @@ -107,7 +108,9 @@ static void
build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
{
MachineState *ms = MACHINE(lams);
int i;
MachineClass *mc = MACHINE_GET_CLASS(ms);
const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
int i, arch_id;
AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = lams->oem_id,
.oem_table_id = lams->oem_table_id };

Expand All @@ -117,13 +120,15 @@ build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
build_append_int_noprefix(table_data, 0, 4);
build_append_int_noprefix(table_data, 1 /* PCAT_COMPAT */, 4); /* Flags */

for (i = 0; i < ms->smp.cpus; i++) {
for (i = 0; i < arch_ids->len; i++) {
/* Processor Core Interrupt Controller Structure */
arch_id = arch_ids->cpus[i].arch_id;

build_append_int_noprefix(table_data, 17, 1); /* Type */
build_append_int_noprefix(table_data, 15, 1); /* Length */
build_append_int_noprefix(table_data, 1, 1); /* Version */
build_append_int_noprefix(table_data, i + 1, 4); /* ACPI Processor ID */
build_append_int_noprefix(table_data, i, 4); /* Core ID */
build_append_int_noprefix(table_data, arch_id, 4); /* Core ID */
build_append_int_noprefix(table_data, 1, 4); /* Flags */
}

Expand Down Expand Up @@ -159,23 +164,29 @@ build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
static void
build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
{
uint64_t i;
int i, arch_id, node_id;
uint64_t mem_len, mem_base;
int nb_numa_nodes = machine->numa_state->num_nodes;
LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
MachineState *ms = MACHINE(lams);
MachineClass *mc = MACHINE_GET_CLASS(lams);
const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
AcpiTable table = { .sig = "SRAT", .rev = 1, .oem_id = lams->oem_id,
.oem_table_id = lams->oem_table_id };

acpi_table_begin(&table, table_data);
build_append_int_noprefix(table_data, 1, 4); /* Reserved */
build_append_int_noprefix(table_data, 0, 8); /* Reserved */

for (i = 0; i < ms->smp.cpus; ++i) {
for (i = 0; i < arch_ids->len; ++i) {
arch_id = arch_ids->cpus[i].arch_id;
node_id = arch_ids->cpus[i].props.node_id;

/* Processor Local APIC/SAPIC Affinity Structure */
build_append_int_noprefix(table_data, 0, 1); /* Type */
build_append_int_noprefix(table_data, 16, 1); /* Length */
/* Proximity Domain [7:0] */
build_append_int_noprefix(table_data, 0, 1);
build_append_int_noprefix(table_data, i, 1); /* APIC ID */
build_append_int_noprefix(table_data, node_id, 1);
build_append_int_noprefix(table_data, arch_id, 1); /* APIC ID */
/* Flags, Table 5-36 */
build_append_int_noprefix(table_data, 1, 4);
build_append_int_noprefix(table_data, 0, 1); /* Local SAPIC EID */
Expand All @@ -184,16 +195,36 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
build_append_int_noprefix(table_data, 0, 4); /* Reserved */
}

/* Node0 */
build_srat_memory(table_data, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE,
0, MEM_AFFINITY_ENABLED);
mem_base = VIRT_HIGHMEM_BASE;
if (!nb_numa_nodes) {
mem_len = machine->ram_size - VIRT_LOWMEM_SIZE;
} else {
mem_len = machine->numa_state->nodes[0].node_mem - VIRT_LOWMEM_SIZE;
}
if (mem_len)
build_srat_memory(table_data, mem_base, mem_len, 0, MEM_AFFINITY_ENABLED);

/* Node1 - Nodemax */
if (nb_numa_nodes) {
mem_base += mem_len;
for (i = 1; i < nb_numa_nodes; ++i) {
if (machine->numa_state->nodes[i].node_mem > 0) {
build_srat_memory(table_data, mem_base,
machine->numa_state->nodes[i].node_mem, i,
MEM_AFFINITY_ENABLED);
mem_base += machine->numa_state->nodes[i].node_mem;
}
}
}

build_srat_memory(table_data, VIRT_HIGHMEM_BASE, machine->ram_size - VIRT_LOWMEM_SIZE,
0, MEM_AFFINITY_ENABLED);

if (ms->device_memory) {
build_srat_memory(table_data, ms->device_memory->base,
memory_region_size(&ms->device_memory->mr),
0, MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
if (machine->device_memory) {
build_srat_memory(table_data, machine->device_memory->base,
memory_region_size(&machine->device_memory->mr),
nb_numa_nodes - 1,
MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
}

acpi_table_end(linker, &table);
Expand Down Expand Up @@ -406,9 +437,26 @@ static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
acpi_add_table(table_offsets, tables_blob);
build_madt(tables_blob, tables->linker, lams);

acpi_add_table(table_offsets, tables_blob);
build_pptt(tables_blob, tables->linker, machine,
lams->oem_id, lams->oem_table_id);

acpi_add_table(table_offsets, tables_blob);
build_srat(tables_blob, tables->linker, machine);

if (machine->numa_state->num_nodes) {
if (machine->numa_state->have_numa_distance) {
acpi_add_table(table_offsets, tables_blob);
build_slit(tables_blob, tables->linker, machine, lams->oem_id,
lams->oem_table_id);
}
if (machine->numa_state->hmat_enabled) {
acpi_add_table(table_offsets, tables_blob);
build_hmat(tables_blob, tables->linker, machine->numa_state,
lams->oem_id, lams->oem_table_id);
}
}

acpi_add_table(table_offsets, tables_blob);
{
AcpiMcfgInfo mcfg = {
Expand Down

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