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hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO
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Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).

Signed-off-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230831165701.2016397-4-francisco.iglesias@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@figlesia-xilinx @pm215
figlesia-xilinx authored and pm215 committed Sep 8, 2023
1 parent 86d916c commit ebfdc49
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96 changes: 96 additions & 0 deletions hw/misc/xlnx-versal-cfu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -264,6 +264,25 @@ static void cfu_stream_write(void *opaque, hwaddr addr, uint64_t value,
}
}

static uint64_t cfu_fdro_read(void *opaque, hwaddr addr, unsigned size)
{
XlnxVersalCFUFDRO *s = XLNX_VERSAL_CFU_FDRO(opaque);
uint64_t ret = 0;

if (!fifo32_is_empty(&s->fdro_data)) {
ret = fifo32_pop(&s->fdro_data);
}

return ret;
}

static void cfu_fdro_write(void *opaque, hwaddr addr, uint64_t value,
unsigned size)
{
qemu_log_mask(LOG_GUEST_ERROR, "%s: Unsupported write from addr=%"
HWADDR_PRIx "\n", __func__, addr);
}

static const MemoryRegionOps cfu_stream_ops = {
.read = cfu_stream_read,
.write = cfu_stream_write,
Expand All @@ -274,6 +293,16 @@ static const MemoryRegionOps cfu_stream_ops = {
},
};

static const MemoryRegionOps cfu_fdro_ops = {
.read = cfu_fdro_read,
.write = cfu_fdro_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4,
},
};

static void cfu_apb_init(Object *obj)
{
XlnxVersalCFUAPB *s = XLNX_VERSAL_CFU_APB(obj);
Expand Down Expand Up @@ -305,6 +334,39 @@ static void cfu_apb_init(Object *obj)
sysbus_init_irq(sbd, &s->irq_cfu_imr);
}

static void cfu_fdro_init(Object *obj)
{
XlnxVersalCFUFDRO *s = XLNX_VERSAL_CFU_FDRO(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);

memory_region_init_io(&s->iomem_fdro, obj, &cfu_fdro_ops, s,
TYPE_XLNX_VERSAL_CFU_FDRO, KEYHOLE_STREAM_4K);
sysbus_init_mmio(sbd, &s->iomem_fdro);
fifo32_create(&s->fdro_data, 8 * KiB / sizeof(uint32_t));
}

static void cfu_fdro_reset_enter(Object *obj, ResetType type)
{
XlnxVersalCFUFDRO *s = XLNX_VERSAL_CFU_FDRO(obj);

fifo32_reset(&s->fdro_data);
}

static void cfu_fdro_cfi_transfer_packet(XlnxCfiIf *cfi_if, XlnxCfiPacket *pkt)
{
XlnxVersalCFUFDRO *s = XLNX_VERSAL_CFU_FDRO(cfi_if);

if (fifo32_num_free(&s->fdro_data) >= ARRAY_SIZE(pkt->data)) {
for (int i = 0; i < ARRAY_SIZE(pkt->data); i++) {
fifo32_push(&s->fdro_data, pkt->data[i]);
}
} else {
/* It is a programming error to fill the fifo. */
qemu_log_mask(LOG_GUEST_ERROR,
"CFU_FDRO: CFI data dropped due to full read fifo\n");
}
}

static Property cfu_props[] = {
DEFINE_PROP_LINK("cframe0", XlnxVersalCFUAPB, cfg.cframe[0],
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
Expand Down Expand Up @@ -351,6 +413,16 @@ static const VMStateDescription vmstate_cfu_apb = {
}
};

static const VMStateDescription vmstate_cfu_fdro = {
.name = TYPE_XLNX_VERSAL_CFU_FDRO,
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_FIFO32(fdro_data, XlnxVersalCFUFDRO),
VMSTATE_END_OF_LIST(),
}
};

static void cfu_apb_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
Expand All @@ -360,6 +432,17 @@ static void cfu_apb_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, cfu_props);
}

static void cfu_fdro_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
XlnxCfiIfClass *xcic = XLNX_CFI_IF_CLASS(klass);

dc->vmsd = &vmstate_cfu_fdro;
xcic->cfi_transfer_packet = cfu_fdro_cfi_transfer_packet;
rc->phases.enter = cfu_fdro_reset_enter;
}

static const TypeInfo cfu_apb_info = {
.name = TYPE_XLNX_VERSAL_CFU_APB,
.parent = TYPE_SYS_BUS_DEVICE,
Expand All @@ -372,9 +455,22 @@ static const TypeInfo cfu_apb_info = {
}
};

static const TypeInfo cfu_fdro_info = {
.name = TYPE_XLNX_VERSAL_CFU_FDRO,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(XlnxVersalCFUFDRO),
.class_init = cfu_fdro_class_init,
.instance_init = cfu_fdro_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_XLNX_CFI_IF },
{ }
}
};

static void cfu_apb_register_types(void)
{
type_register_static(&cfu_apb_info);
type_register_static(&cfu_fdro_info);
}

type_init(cfu_apb_register_types)
12 changes: 12 additions & 0 deletions include/hw/misc/xlnx-versal-cfu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -20,10 +20,14 @@
#include "hw/sysbus.h"
#include "hw/register.h"
#include "hw/misc/xlnx-cfi-if.h"
#include "qemu/fifo32.h"

#define TYPE_XLNX_VERSAL_CFU_APB "xlnx,versal-cfu-apb"
OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFUAPB, XLNX_VERSAL_CFU_APB)

#define TYPE_XLNX_VERSAL_CFU_FDRO "xlnx,versal-cfu-fdro"
OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCFUFDRO, XLNX_VERSAL_CFU_FDRO)

REG32(CFU_ISR, 0x0)
FIELD(CFU_ISR, USR_GTS_EVENT, 9, 1)
FIELD(CFU_ISR, USR_GSR_EVENT, 8, 1)
Expand Down Expand Up @@ -210,6 +214,14 @@ struct XlnxVersalCFUAPB {
} cfg;
};


struct XlnxVersalCFUFDRO {
SysBusDevice parent_obj;
MemoryRegion iomem_fdro;

Fifo32 fdro_data;
};

/**
* This is a helper function for updating a CFI data write fifo, an array of 4
* uint32_t and 128 bits of data that are allowed to be written through 4
Expand Down

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