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target/riscv: Remove redundant check on RVH
Check on riscv_cpu_virt_enabled contains the check on RVH.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230327080858.39703-3-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Weiwei Li authored and alistair23 committed May 5, 2023
1 parent 2136b6c commit fbec3f3
Showing 1 changed file with 1 addition and 2 deletions.
3 changes: 1 addition & 2 deletions target/riscv/op_helper.c
Expand Up @@ -278,8 +278,7 @@ target_ulong helper_sret(CPURISCVState *env)
riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
}

if (riscv_has_ext(env, RVH) && riscv_cpu_virt_enabled(env) &&
get_field(env->hstatus, HSTATUS_VTSR)) {
if (riscv_cpu_virt_enabled(env) && get_field(env->hstatus, HSTATUS_VTSR)) {
riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC());
}

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