Skip to content
Permalink

Comparing changes

Choose two branches to see what’s changed or to start a new pull request. If you need to, you can also or learn more about diff comparisons.

Open a pull request

Create a new pull request by comparing changes across two branches. If you need to, you can also . Learn more about diff comparisons here.
base repository: qemu/qemu
base: 017b2e736362
Choose a base ref
...
head repository: qemu/qemu
compare: 4d541f63e90c
Choose a head ref
  • 6 commits
  • 4 files changed
  • 4 contributors

Commits on Jun 27, 2023

  1. icount: don't adjust virtual time backwards after warp

    The icount-based QEMU_CLOCK_VIRTUAL runs ahead of the RT clock at times.
    When warping, it is possible it is still ahead at the end of the warp,
    which causes icount adaptive mode to adjust it backward. This can result
    in the machine observing time going backwards.
    
    Prevent this by clamping adaptive adjustment to 0 at minimum.
    
    Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
    Message-ID: <20230627061406.241847-1-npiggin@gmail.com>
    Cc: qemu-stable@nongnu.org
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    npiggin authored and bonzini committed Jun 27, 2023
    Copy the full SHA
    67f8534 View commit details
    Browse the repository at this point in the history

Commits on Jun 29, 2023

  1. target/i386: Export MSR_ARCH_CAPABILITIES bits to guests

    On Intel CPUs there are certain bits in MSR_ARCH_CAPABILITIES that
    indicates if the CPU is not affected by a vulnerability. Without these
    bits guests may try to deploy the mitigation even if the CPU is not
    affected.
    
    Export the bits to guests that indicate immunity to hardware
    vulnerabilities.
    
    Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
    Message-ID: <63d85cc76d4cdc51e6c732478b81d8f13be11e5a.1687551881.git.pawan.kumar.gupta@linux.intel.com>
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    pa1gupta authored and bonzini committed Jun 29, 2023
    Copy the full SHA
    5bef742 View commit details
    Browse the repository at this point in the history
  2. target/i386: ignore ARCH_CAPABILITIES features in user mode emulation

    ARCH_CAPABILITIES is only accessible through a read-only MSR, so it has
    no impact on any user-mode operation (user-mode cannot read the MSR).
    So do not bother printing warnings about it in user mode emulation.
    
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    bonzini committed Jun 29, 2023
    Copy the full SHA
    9fb4f5f View commit details
    Browse the repository at this point in the history
  3. target/i386: ignore CPL0-specific features in user mode emulation

    Features such as PCID are only accessible through privileged operations,
    and therefore have no impact on any user-mode operation.  Allow reporting
    them to programs running under user mode emulation, so that "-cpu" can be
    used with more named CPU models.
    
    XSAVES would be similar, but it doesn't make sense to provide it until
    XSAVEC is implemented.
    
    With this change, all CPUs up to Broadwell-v4 can be emulate.  Skylake-Client
    requires XSAVEC, while EPYC also requires SHA-NI, MISALIGNSSE and TOPOEXT.
    MISALIGNSSE is not hard to implement, but I am not sure it is worth using
    a precious hflags bit for it.
    
    Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1534
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    bonzini committed Jun 29, 2023
    Copy the full SHA
    d903259 View commit details
    Browse the repository at this point in the history
  4. target/i386: emulate 64-bit ring 0 for linux-user if LM feature is set

    32-bit binaries can run on a long mode processor even if the kernel
    is 64-bit, of course, and this can have slightly different behavior;
    for example, SYSCALL is allowed on Intel processors.
    
    Allow reporting LM to programs running under user mode emulation,
    so that "-cpu" can be used with named CPU models even for qemu-i386
    and even without disabling LM by hand.
    
    Fortunately, most of the runtime code in QEMU has to depend on HF_LMA_MASK
    or on HF_CS64_MASK (which is anyway false for qemu-i386's 32-bit code
    segment) rather than TARGET_X86_64, therefore all that is needed is an
    update of linux-user's ring 0 setup.
    
    Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1534
    Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
    bonzini committed Jun 29, 2023
    Copy the full SHA
    40a205d View commit details
    Browse the repository at this point in the history
  5. Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

    * Make named CPU models usable for qemu-{i386,x86_64}
    * Fix backwards time with -icount auto
    
    # -----BEGIN PGP SIGNATURE-----
    #
    # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmSdRiQUHHBib256aW5p
    # QHJlZGhhdC5jb20ACgkQv/vSX3jHroOqcwf9FGAqZ+0V34Y8XeXMu8Es3bFjEKG8
    # t3BpVNhTBOYDPvpshnPVx2I29nRT2opc1C4YkjMAv5/1nivj1kDM7hDObOSJQvqy
    # 5FgTsJYqRtGj+J7uVBrspWZsP8BYeykKmXR6deBOPvCuw5nnLdDQ3dLV2F26lKUu
    # lsFyEVbi4dzf8+TVuNIXEg7mVBYytjBQwBmmHgeOofeikjq9WEudr49mwJMCHyzl
    # iXCatnctXGKZYSnp+eHIBiFRdSzjqdgrDRa0ysSqABoBI1pmkhyQKSay6cSjfG4n
    # gFlqPF/i9RqAWpsQrM1IMGgPK39SrT2dYlHDJV2P/NEQrS6kLh2HoW/ArQ==
    # =oj3B
    # -----END PGP SIGNATURE-----
    # gpg: Signature made Thu 29 Jun 2023 10:51:48 AM CEST
    # gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
    # gpg:                issuer "pbonzini@redhat.com"
    # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
    # gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
    # gpg: WARNING: This key is not certified with a trusted signature!
    # gpg:          There is no indication that the signature belongs to the owner.
    # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
    #      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83
    
    * tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
      target/i386: emulate 64-bit ring 0 for linux-user if LM feature is set
      target/i386: ignore CPL0-specific features in user mode emulation
      target/i386: ignore ARCH_CAPABILITIES features in user mode emulation
      target/i386: Export MSR_ARCH_CAPABILITIES bits to guests
      icount: don't adjust virtual time backwards after warp
    
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    rth7680 committed Jun 29, 2023
    Copy the full SHA
    4d541f6 View commit details
    Browse the repository at this point in the history