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base repository: qemu/qemu
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  • 3 commits
  • 2 files changed
  • 3 contributors

Commits on Aug 11, 2023

  1. hw/pci-host: Allow extended config space access for Designware PCIe host

    In pcie_bus_realize(), a root bus is realized as a PCIe bus and a non-root
    bus is realized as a PCIe bus if its parent bus is a PCIe bus. However,
    the child bus "dw-pcie" is realized before the parent bus "pcie" which is
    the root PCIe bus. Thus, the extended configuration space is not accessible
    on "dw-pcie". The issue can be resolved by adding the
    PCI_BUS_EXTENDED_CONFIG_SPACE flag to "pcie" before "dw-pcie" is realized.
    
    Signed-off-by: Jason Chien <jason.chien@sifive.com>
    Message-Id: <20230809102257.25121-1-jason.chien@sifive.com>
    Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
    Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
    Reviewed-by: Frank Chang <frank.chang@sifive.com>
    Signed-off-by: Jason Chien &lt;<a href="mailto:jason.chien@sifive.com" target="_blank">jason.chien@sifive.com</a>&gt;<br>
    Jason Chien authored and mstsirkin committed Aug 11, 2023
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  2. pci: Fix the update of interrupt disable bit in PCI_COMMAND register

    The PCI_COMMAND register is located at offset 4 within
    the PCI configuration space and occupies 2 bytes. The
    interrupt disable bit is at the 10th bit, which corresponds
    to the byte at offset 5 in the PCI configuration space.
    
    In our testing environment, the guest driver may directly
    updates the byte at offset 5 in the PCI configuration space.
    The backtrace looks like as following:
        at hw/pci/pci.c:1442
        at hw/virtio/virtio-pci.c:605
        val=5, len=1) at hw/pci/pci_host.c:81
    
    In this situation, the range_covers_byte function called
    by the pci_default_write_config function will return false,
    resulting in the inability to handle the interrupt disable
    update event.
    
    To fix this issue, we can use the ranges_overlap function
    instead of range_covers_byte to determine whether the interrupt
    bit has been updated.
    
    Signed-off-by: Guoyi Tu <tugy@chinatelecom.cn>
    Signed-off-by: yuanminghao <yuanmh12@chinatelecom.cn>
    Message-Id: <ce2d0437-8faa-4d61-b536-4668f645a959@chinatelecom.cn>
    Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
    Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
    Fixes: b6981cb ("pci: interrupt disable bit support")
    Guoyi Tu authored and mstsirkin committed Aug 11, 2023
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  3. Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/m…

    …st/qemu into staging
    
    pci: last minute bugfixes
    
    two fixes that seem very safe and important enough to sneak
    in before the release.
    
    Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
    
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    * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu:
      pci: Fix the update of interrupt disable bit in PCI_COMMAND register
      hw/pci-host: Allow extended config space access for Designware PCIe host
    
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    rth7680 committed Aug 11, 2023
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