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  • 12 commits
  • 14 files changed
  • 5 contributors

Commits on Jun 30, 2023

  1. ui/dbus: fix build errors in dbus_update_gl_cb and dbus_call_update_gl

    Add some ifdefs to avoid an unused function and unused variable.
    
    Fixes: de1f8ce ("ui/dbus: use shared D3D11 Texture2D when possible")
    Co-developed-by: BALATON Zoltan <balaton@eik.bme.hu>
    Message-Id: <336f7697-bcfa-1f5f-e411-6859815aa26c@eik.bme.hu>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    rth7680 committed Jun 30, 2023
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Commits on Jul 1, 2023

  1. audio: dbus requires pixman

    Commit commit 6cc5a61 ("ui/dbus: win32 support") has broken audio/dbus
    compilation when pixman is not included.
    
    Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1739
    
    Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
    Message-Id: <20230630214156.2181558-1-marcandre.lureau@redhat.com>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    elmarco authored and rth7680 committed Jul 1, 2023
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  2. accel/tcg: Fix start page passed to tb_invalidate_phys_page_range__lo…

    …cked
    
    Due to a copy-paste error in tb_invalidate_phys_range, the wrong
    start address was passed to tb_invalidate_phys_page_range__locked.
    Correct is to use the start of each page in turn.
    
    Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
    Fixes: e506ad6 ("accel/tcg: Pass last not end to tb_invalidate_phys_range")
    Message-Id: <20230629082522.606219-2-mark.cave-ayland@ilande.co.uk>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    mcayland authored and rth7680 committed Jul 1, 2023
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  3. accel/tcg: Assert one page in tb_invalidate_phys_page_range__locked

    Ensure that that both the start and last addresses are within
    the same guest page.
    
    Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
    Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
    Message-Id: <20230629082522.606219-3-mark.cave-ayland@ilande.co.uk>
    [rth: Use tcg_debug_assert, simplify the expression]
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    mcayland authored and rth7680 committed Jul 1, 2023
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  4. fpu: Add float64_to_int{32,64}_modulo

    Add versions of float64_to_int* which do not saturate the result.
    
    Reviewed-by: Christoph Muellner <christoph.muellner@vrull.eu>
    Tested-by: Christoph Muellner <christoph.muellner@vrull.eu>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
    Message-Id: <20230527141910.1885950-2-richard.henderson@linaro.org>
    rth7680 committed Jul 1, 2023
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  5. tests/tcg/alpha: Add test for cvttq

    Test for invalid, integer overflow, and inexact.
    Test for proper result, modulo 2**64.
    
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Acked-by: Alex Bennée <alex.bennee@linaro.org>
    Message-Id: <20230527141910.1885950-3-richard.henderson@linaro.org>
    rth7680 committed Jul 1, 2023
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  6. target/alpha: Use float64_to_int64_modulo for CVTTQ

    For the most part we can use the new generic routine,
    though exceptions need some post-processing to sort
    invalid from integer overflow.
    
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
    Message-Id: <20230527141910.1885950-4-richard.henderson@linaro.org>
    rth7680 committed Jul 1, 2023
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  7. target/arm: Use float64_to_int32_modulo for FJCVTZS

    The standard floating point results are provided by the generic routine.
    We only need handle the extra Z flag result afterward.
    
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
    Message-Id: <20230527141910.1885950-5-richard.henderson@linaro.org>
    rth7680 committed Jul 1, 2023
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  8. tcg: Reduce tcg_assert_listed_vecop() scope

    tcg_assert_listed_vecop() is only used in tcg-op-vec.c.
    
    Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
    Message-Id: <20230629091107.74384-1-philmd@linaro.org>
    Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    philmd authored and rth7680 committed Jul 1, 2023
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  9. target/nios2 : Explicitly ask for target-endian loads and stores

    When we generate code for guest loads and stores, at the moment they
    end up being requests for a host-endian access. So for target-system-nios2
    (little endian) a load like
       ldw        r3,0(r4)
    results on an x86 host in the TCG IR
       qemu_ld_a32_i32 r3,loc2,al+leul,0
    but on s390 it is
       qemu_ld_a32_i32 r3,loc2,al+beul,0
    
    The result is that guests don't work on big-endian hosts.
    
    Use the MO_TE* memops rather than the plain ones.
    
    Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1693
    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
    Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
    Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
    Message-Id: <20230623172556.1951974-1-peter.maydell@linaro.org>
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    pm215 authored and rth7680 committed Jul 1, 2023
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  10. linux-user: Avoid mmap of the last byte of the reserved_va

    There is an overflow problem in mmap_find_vma_reserved:
    when reserved_va == UINT32_MAX, end may overflow to 0.
    Rather than a larger rewrite at this time, simply avoid
    the final byte of the VA, which avoids searching the
    final page, which avoids the overflow.
    
    Cc: qemu-stable@nongnu.org
    Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1741
    Fixes: 95059f9 ("include/exec: Change reserved_va semantics to last byte")
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    Tested-by: Michael Tokarev <mjt@tls.msk.ru>
    Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
    Message-Id: <20230629080835.71371-1-richard.henderson@linaro.org>
    rth7680 committed Jul 1, 2023
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  11. Merge tag 'pull-tcg-20230701' of https://gitlab.com/rth7680/qemu into…

    … staging
    
    dbus: Two hot fixes, per request of Marc-André Lureau
    accel/tcg: Fix tb_invalidate_phys_range iteration
    fpu: Add float64_to_int{32,64}_modulo
    tcg: Reduce scope of tcg_assert_listed_vecop
    target/nios2: Explicitly ask for target-endian loads
    linux-user: Avoid mmap of the last byte of the reserved_va
    
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    * tag 'pull-tcg-20230701' of https://gitlab.com/rth7680/qemu:
      linux-user: Avoid mmap of the last byte of the reserved_va
      target/nios2 : Explicitly ask for target-endian loads and stores
      tcg: Reduce tcg_assert_listed_vecop() scope
      target/arm: Use float64_to_int32_modulo for FJCVTZS
      target/alpha: Use float64_to_int64_modulo for CVTTQ
      tests/tcg/alpha: Add test for cvttq
      fpu: Add float64_to_int{32,64}_modulo
      accel/tcg: Assert one page in tb_invalidate_phys_page_range__locked
      accel/tcg: Fix start page passed to tb_invalidate_phys_page_range__locked
      audio: dbus requires pixman
      ui/dbus: fix build errors in dbus_update_gl_cb and dbus_call_update_gl
    
    Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
    rth7680 committed Jul 1, 2023
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