From 4d714f2defcd926b4f8c0425af363b382d3084cb Mon Sep 17 00:00:00 2001 From: Sid Manning Date: Thu, 17 Sep 2020 15:12:49 -0500 Subject: [PATCH] Cleanup addressing some of the comments from the maintainer. This should be NFC. --- arch/hexagon/atomic_arch.h | 18 ++------- arch/hexagon/bits/alltypes.h.in | 10 +---- arch/hexagon/bits/setjmp.h | 5 +-- arch/hexagon/bits/signal.h | 6 +-- arch/hexagon/bits/syscall.h.in | 56 ++++++++++++--------------- arch/hexagon/crt_arch.h | 2 +- arch/hexagon/reloc.h | 11 +----- arch/hexagon/syscall_arch.h | 3 +- src/fenv/hexagon/fenv.S | 67 +++++++++++++++++---------------- 9 files changed, 70 insertions(+), 108 deletions(-) diff --git a/arch/hexagon/atomic_arch.h b/arch/hexagon/atomic_arch.h index ede55956..262ad6a8 100644 --- a/arch/hexagon/atomic_arch.h +++ b/arch/hexagon/atomic_arch.h @@ -1,30 +1,18 @@ #define a_ctz_32 a_ctz_32 static inline int a_ctz_32(unsigned long x) { - __asm__( - "%0 = ct0(%0)\n\t" - : "+r"(x)); - return x; + return __builtin_ctzl(x); } #define a_ctz_64 a_ctz_64 static inline int a_ctz_64(uint64_t x) { - int count; - __asm__( - "%0 = ct0(%1)\n\t" - : "=r"(count) : "r"(x)); - return count; + return __builtin_ctzll(x); } #define a_clz_64 a_clz_64 static inline int a_clz_64(uint64_t x) { - int count; - __asm__( - "%1 = brev(%1)\n\t" - "%0 = ct0(%1)\n\t" - : "=r"(count) : "r"(x)); - return count; + return __builtin_clzll(x); } #define a_cas a_cas diff --git a/arch/hexagon/bits/alltypes.h.in b/arch/hexagon/bits/alltypes.h.in index 9d770c7e..e5d9d616 100644 --- a/arch/hexagon/bits/alltypes.h.in +++ b/arch/hexagon/bits/alltypes.h.in @@ -15,12 +15,4 @@ TYPEDEF long wchar_t; TYPEDEF float float_t; TYPEDEF double double_t; - -#if !defined(__cplusplus) -TYPEDEF struct { _Alignas(8) long long __ll; long double __ld; } max_align_t; -#elif defined(__GNUC__) -TYPEDEF struct { __attribute__((__aligned__(8))) long long __ll; long double __ld; } max_align_t; -#else -TYPEDEF struct { alignas(8) long long __ll; long double __ld; } max_align_t; -#endif - +TYPEDEF struct { long long __ll; long double __ld; } max_align_t; diff --git a/arch/hexagon/bits/setjmp.h b/arch/hexagon/bits/setjmp.h index 5ee5e49f..2d75319a 100644 --- a/arch/hexagon/bits/setjmp.h +++ b/arch/hexagon/bits/setjmp.h @@ -1,4 +1 @@ - -typedef struct { - long regs[16]; -} __jmp_buf[1] __attribute__((aligned (8))); +typedef long long __jmp_buf[8]; diff --git a/arch/hexagon/bits/signal.h b/arch/hexagon/bits/signal.h index 7a3b36d0..b119f163 100644 --- a/arch/hexagon/bits/signal.h +++ b/arch/hexagon/bits/signal.h @@ -32,9 +32,8 @@ typedef struct sigcontext unsigned long cause; unsigned long badva; unsigned long pad1; - unsigned long pad2; - unsigned long pad3; -} __attribute__((__aligned__(8))) mcontext_t; + unsigned long long pad2; +} mcontext_t; #else typedef struct { unsigned long __regs[48]; @@ -53,7 +52,6 @@ typedef struct __ucontext { stack_t uc_stack; mcontext_t uc_mcontext; sigset_t uc_sigmask; -// unsigned long long uc_regspace[64]; } ucontext_t; #define SA_NOCLDSTOP 1 diff --git a/arch/hexagon/bits/syscall.h.in b/arch/hexagon/bits/syscall.h.in index 77ca3fa0..179cb34c 100644 --- a/arch/hexagon/bits/syscall.h.in +++ b/arch/hexagon/bits/syscall.h.in @@ -23,7 +23,7 @@ #define __NR_epoll_pwait 22 #define __NR_dup 23 #define __NR_dup3 24 -#define __NR3264_fcntl 25 +#define __NR_fcntl 25 #define __NR_inotify_init1 26 #define __NR_inotify_add_watch 27 #define __NR_inotify_rm_watch 28 @@ -41,10 +41,10 @@ #define __NR_mount 40 #define __NR_pivot_root 41 #define __NR_nfsservctl 42 -#define __NR3264_statfs 43 -#define __NR3264_fstatfs 44 -#define __NR3264_truncate 45 -#define __NR3264_ftruncate 46 +#define __NR_statfs 43 +#define __NR_fstatfs 44 +#define __NR_truncate 45 +#define __NR_ftruncate 46 #define __NR_fallocate 47 #define __NR_faccessat 48 #define __NR_chdir 49 @@ -60,7 +60,7 @@ #define __NR_pipe2 59 #define __NR_quotactl 60 #define __NR_getdents64 61 -#define __NR3264_lseek 62 +#define __NR_lseek 62 #define __NR_read 63 #define __NR_write 64 #define __NR_readv 65 @@ -69,7 +69,7 @@ #define __NR_pwrite64 68 #define __NR_preadv 69 #define __NR_pwritev 70 -#define __NR3264_sendfile 71 +#define __NR_sendfile 71 #define __NR_pselect6 72 #define __NR_ppoll 73 #define __NR_signalfd4 74 @@ -77,8 +77,8 @@ #define __NR_splice 76 #define __NR_tee 77 #define __NR_readlinkat 78 -#define __NR3264_fstatat 79 -#define __NR3264_fstat 80 +#define __NR_fstatat 79 +#define __NR_fstat 80 #define __NR_sync 81 #define __NR_fsync 82 #define __NR_fdatasync 83 @@ -112,7 +112,7 @@ #define __NR_timer_settime 110 #define __NR_timer_delete 111 #define __NR_clock_settime 112 -#define __NR_clock_gettime 113 +#define __NR_clock_gettime32 113 #define __NR_clock_getres 114 #define __NR_clock_nanosleep 115 #define __NR_syslog 116 @@ -168,7 +168,7 @@ #define __NR_umask 166 #define __NR_prctl 167 #define __NR_getcpu 168 -#define __NR_gettimeofday 169 +#define __NR_gettimeofday_time32 169 #define __NR_settimeofday 170 #define __NR_adjtimex 171 #define __NR_getpid 172 @@ -221,8 +221,8 @@ #define __NR_keyctl 219 #define __NR_clone 220 #define __NR_execve 221 -#define __NR3264_mmap 222 -#define __NR3264_fadvise64 223 +#define __NR_mmap 222 +#define __NR_fadvise64 223 #define __NR_swapon 224 #define __NR_swapoff 225 #define __NR_mprotect 226 @@ -297,21 +297,15 @@ #define __NR_futex_time64 422 #define __NR_sched_rr_get_interval_time64 423 #define __NR_syscalls (__NR_sched_rr_get_interval_time64+1) -#define __NR_fcntl __NR3264_fcntl -#define __NR_fstatfs __NR3264_fstatfs -#define __NR_truncate __NR3264_truncate -#define __NR_ftruncate __NR3264_ftruncate -#define __NR_lseek __NR3264_lseek -#define __NR_sendfile __NR3264_sendfile -#define __NR_newfstatat __NR3264_fstatat -#define __NR_fcntl64 __NR3264_fcntl -#define __NR_statfs64 __NR3264_statfs -#define __NR_fstatfs64 __NR3264_fstatfs -#define __NR_truncate64 __NR3264_truncate -#define __NR_ftruncate64 __NR3264_ftruncate -#define __NR__llseek __NR3264_lseek -#define __NR_sendfile64 __NR3264_sendfile -#define __NR_fstatat64 __NR3264_fstatat -#define __NR_fstat64 __NR3264_fstat -#define __NR_mmap2 __NR3264_mmap -#define __NR_fadvise64_64 __NR3264_fadvise64 +#define __NR_newfstatat __NR_fstatat +#define __NR_fcntl64 __NR_fcntl +#define __NR_statfs64 __NR_statfs +#define __NR_fstatfs64 __NR_fstatfs +#define __NR_truncate64 __NR_truncate +#define __NR_ftruncate64 __NR_ftruncate +#define __NR__llseek __NR_lseek +#define __NR_sendfile64 __NR_sendfile +#define __NR_fstatat64 __NR_fstatat +#define __NR_fstat64 __NR_fstat +#define __NR_mmap2 __NR_mmap +#define __NR_fadvise64_64 __NR_fadvise64 diff --git a/arch/hexagon/crt_arch.h b/arch/hexagon/crt_arch.h index 331a797e..0c1facec 100644 --- a/arch/hexagon/crt_arch.h +++ b/arch/hexagon/crt_arch.h @@ -27,7 +27,7 @@ __asm__( ".long 1f - 0f /* name length */ \n" ".long 3f - 2f /* data length */ \n" ".long 1 /* note type */ \n" -"0: .asciz \"GNU\" /* vendor name seems like this should be MUSL but lldb doesn't agree.*/ \n" +"0: .asciz \"GNU\" \n" "1: .align 4 \n" "2: .long 0 /* linux */ \n" " .long 3,0,0 \n" diff --git a/arch/hexagon/reloc.h b/arch/hexagon/reloc.h index 14085872..de171961 100644 --- a/arch/hexagon/reloc.h +++ b/arch/hexagon/reloc.h @@ -1,15 +1,6 @@ #include -#if __BYTE_ORDER == __LITTLE_ENDIAN -#define ENDIAN_SUFFIX "el" -#else -#define ENDIAN_SUFFIX "" -#endif - -#define FP_SUFFIX "" - -#define LDSO_ARCH "hexagon" ENDIAN_SUFFIX FP_SUFFIX - +#define LDSO_ARCH "hexagon" #define TPOFF_K 0 #define REL_SYMBOLIC R_HEX_32 diff --git a/arch/hexagon/syscall_arch.h b/arch/hexagon/syscall_arch.h index e6defe41..625ec039 100644 --- a/arch/hexagon/syscall_arch.h +++ b/arch/hexagon/syscall_arch.h @@ -62,7 +62,8 @@ static inline long __syscall5(long n, long a, long b, long c, long d, long e) __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4)); } -static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f) +static inline long __syscall6(long n, long a, long b, long c, long d, long e, + long f) { register long r6 __asm__("r6") = n; register long r0 __asm__("r0") = a; diff --git a/src/fenv/hexagon/fenv.S b/src/fenv/hexagon/fenv.S index 07b89764..ba1d0c75 100644 --- a/src/fenv/hexagon/fenv.S +++ b/src/fenv/hexagon/fenv.S @@ -1,22 +1,23 @@ /* -The Hexagon user status register includes five status fields which work as -sticky flags for the five IEEE-defined exception conditions: inexact, overflow, underflow, -divide by zero, and invalid. A sticky flag is set when the corresponding exception occurs, -and remains set until explicitly cleared. - - usr:23:22 - Rounding Mode - 00: Round toward nearest - 01: Round toward zero - 10: Downward Round toward negative infinity - 11: Upward Round toward positive infinity - - usr:5 - Floating-point IEEE Inexact Sticky Flag. - usr:4 - Floating-point IEEE Underflow Sticky Flag. - usr:3 - Floating-point IEEE Overflow Sticky Flag. - usr:2 - Floating-point IEEE Divide-By-Zero Sticky Flag. - usr:1 - Floating-point IEEE Invalid Sticky Flag. - usr:0 - Sticky Saturation Overflow, when 1 saturation occurred. -*/ + * The Hexagon user status register includes five status fields which work + * as sticky flags for the five IEEE-defined exception conditions: + * inexact, overflow, underflow, divide by zero, and invalid. + * A sticky flag is set when the corresponding exception occurs, + * and remains set until explicitly cleared. + * + * usr:23:22 - Rounding Mode + * 00: Round toward nearest + * 01: Round toward zero + * 10: Downward Round toward negative infinity + * 11: Upward Round toward positive infinity + * + * usr:5 - Floating-point IEEE Inexact Sticky Flag. + * usr:4 - Floating-point IEEE Underflow Sticky Flag. + * usr:3 - Floating-point IEEE Overflow Sticky Flag. + * usr:2 - Floating-point IEEE Divide-By-Zero Sticky Flag. + * usr:1 - Floating-point IEEE Invalid Sticky Flag. + * usr:0 - Sticky Saturation Overflow, when 1 saturation occurred. + */ #define FE_ALL_EXCEPT 0x3f @@ -28,8 +29,8 @@ and remains set until explicitly cleared. #define RND_UP (0x3 << 22) /* -int feclearexcept(int mask) -*/ + * int feclearexcept(int mask) + */ .global feclearexcept .type feclearexcept,@function feclearexcept: @@ -45,8 +46,8 @@ feclearexcept: } /* -int feraiseexcept(int mask) -*/ + * int feraiseexcept(int mask) + */ .global feraiseexcept .type feraiseexcept,@function feraiseexcept: @@ -63,8 +64,8 @@ feraiseexcept: /* -int fetestexcept(int mask) -*/ + * int fetestexcept(int mask) + */ .global fetestexcept .type fetestexcept,@function fetestexcept: @@ -78,8 +79,8 @@ fetestexcept: } /* -int fegetround(void) -*/ + *int fegetround(void) + */ .global fegetround .type fegetround,@function fegetround: @@ -89,8 +90,8 @@ fegetround: jumpr r31 /* -int __fesetround(int r) -*/ + * int __fesetround(int r) + */ .global __fesetround .type __fesetround,@function __fesetround: @@ -110,8 +111,8 @@ __fesetround: } /* -int fegetenv(fenv_t *envp) -*/ + * int fegetenv(fenv_t *envp) + */ .global fegetenv .type fegetenv,@function fegetenv: @@ -123,8 +124,8 @@ fegetenv: } /* -int fesetenv(const fenv_t *envp) -*/ + * int fesetenv(const fenv_t *envp) + */ .global fesetenv .type fesetenv,@function fesetenv: @@ -135,7 +136,7 @@ fesetenv: r1 = and(r1, r2) // MASK the input bits with the FE bits r3 = usr r3 = and(r3, ~r2) // Clear any currently set FE bits - r3 = or(r3, r1) // Set the newbits + r3 = or(r3, r1) // Set the newbits usr = r3 { r0 = #0