fix lots of spelling

fix some errors from the sed script

undo file mode crap

binr/radare2/radare2.c

@@ -651,7 +651,7 @@ int main(int argc, char **argv, char **envp) {
 		}
 		r_list_free (evals);
 #endif
-		// no flagspace selected by default the begining
+		// no flagspace selected by default the beginning
 		r.flags->space_idx = -1;
 		/* load <file>.r2 */
 		{
@@ -721,7 +721,7 @@ int main(int argc, char **argv, char **envp) {
 		if (seek != UT64_MAX)
 			r_core_seek (&r, seek, 1);
 
-		// no flagspace selected by default the begining
+		// no flagspace selected by default the beginning
 		r.flags->space_idx = -1;
 		for (;;) {
 			r.zerosep = zerosep;

doc/fortunes

@@ -206,7 +206,7 @@ r2 your penis
 This is just an existentialist experiment.
 Nothing to see here. Move along.
 Select your character: RBin Wizard, Master Anal Paladin, or Assembly Wizard
-I accidently radared my filesystem today.
+I accidentally radared my filesystem today.
 No fix, no sleep
 You see it, you fix it!
 V is for Visual

libr/anal/fcn.c

@@ -423,7 +423,7 @@ static int fcn_recurse(RAnal *anal, RAnalFunction *fcn, ut64 addr, ut8 *buf, ut6
 			}
 #endif
 		} else {
-			/* if not eobjmp. a jump will break the function if jumps before the begining of the function */
+			/* if not eobjmp. a jump will break the function if jumps before the beginning of the function */
 			if (op.jump < fcn->addr) {
 				if (!overlapped) {
 					bb->jump = op.jump;

libr/asm/arch/arc/gnu/arc-opc.c

@@ -258,7 +258,7 @@ static const struct arc_operand arc_operands_a4[] =
 #define SYNTAX_LD (SYNTAX_ST + 1)
   { '3', 9, 0, ARC_OPERAND_FAKE | ARC_OPERAND_ERROR, insert_ld_syntax, extract_ld_syntax },
 
-/* Flag update bit (insertion is defered until we know how).  */
+/* Flag update bit (insertion is deferred until we know how).  */
 #define FLAG (SYNTAX_LD + 1)
   { 'f', 1, 8, ARC_OPERAND_SUFFIX, insert_flag, extract_flag },
 
@@ -528,7 +528,7 @@ static const struct arc_operand arc_operands_ac[] =
 #define COND_AC (FORCELIMM_AC + 1)
   { 'q', 5, 0, ARC_OPERAND_SUFFIX, insert_cond, extract_cond },
 
-/* flag update bit (insertion is defered until we know how) */
+/* flag update bit (insertion is deferred until we know how) */
 #define FLAG_AC (COND_AC + 1)
   { 'f', 1, 15, ARC_OPERAND_SUFFIX, insert_flag, extract_flag },
 

libr/asm/arch/arm/aarch64/aarch64-dis.c

@@ -2319,7 +2319,7 @@ print_insn_aarch64 (bfd_vma pc,
 	    n = last_mapping_sym;
 
 	  /* No mapping symbol found at this address.  Look backwards
-	     for a preceeding one.  */
+	     for a preceding one.  */
 	  for (; n >= 0; n--)
 	    {
 	      if (get_sym_code_type (info, n, &type))

libr/asm/arch/arm/gnu/arm-dis.c

@@ -4595,10 +4595,10 @@ parse_disassembler_options (char *options)
     {
       parse_arm_disassembler_option (options);
 
-      /* Skip forward to next seperator.  */
+      /* Skip forward to next separator.  */
       while ((*options) && (! ISSPACE (*options)) && (*options != ','))
 	++ options;
-      /* Skip forward past seperators.  */
+      /* Skip forward past separators.  */
       while (ISSPACE (*options) || (*options == ','))
 	++ options;      
     }

libr/asm/arch/include/ansidecl.h

@@ -1,4 +1,4 @@
-/* ANSI and traditional C compatability macros
+/* ANSI and traditional C compatibility macros
    Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001
    Free Software Foundation, Inc.
    This file is part of the GNU C Library.

libr/asm/arch/include/elf/common.h

@@ -578,7 +578,7 @@
 /* The next four dynamic tags are used on Solaris.  We support them
    everywhere.	Note these values lie outside of the (new) range for
    OS specific values.	This is a deliberate special case and we
-   maintain it for backwards compatability.  */
+   maintain it for backwards compatibility.  */
 #define DT_VALRNGLO	0x6ffffd00
 #define DT_GNU_PRELINKED 0x6ffffdf5
 #define DT_GNU_CONFLICTSZ 0x6ffffdf6

libr/asm/arch/include/opintl.h

@@ -26,7 +26,7 @@
    
    This is because the code in this directory is used to build a library which
    will be linked with code in other directories to form programs.  We want to
-   maintain a seperate translation file for this directory however, rather
+   maintain a separate translation file for this directory however, rather
    than being forced to merge it with that of any program linked to
    libopcodes.  This is a library, so it cannot depend on the catalog
    currently loaded.

libr/asm/arch/m68k/m68k_disasm/m68k_disasm.c

@@ -195,7 +195,7 @@ static inline u_long read32(short *p) {
 
 R_IPI m68k_word *M68k_Disassemble(struct DisasmPara_68k *dp)
 /* Disassemble M68k instruction and return a pointer to the next */
-/* instruction, or NULL if an error occured. */
+/* instruction, or NULL if an error occurred. */
 {
   u_short opc;
   dis_func_t *func;
@@ -2797,7 +2797,7 @@ static void get_modregstr_mit(dis_buffer_t *dbuf,int bit, int mod, int sz, int d
           bd == 3 ? SIZE_LONG :
           SIZE_BYTE);
       if (od && !ISBITSET(ext,6) && !ISBITSET(ext,2)) 
-        /* Pre-indexed and not supressing index */
+        /* Pre-indexed and not suppressing index */
         addchar(',');
       else if (od && ISBITSET(ext,2)) {
         /* Post-indexed */

libr/asm/arch/x86/ollyasm/asmserv.c

@@ -561,7 +561,7 @@ const t_cmddata cmddata[] = {
   { 0x00FFFF, 0x00610F, 2,00,  RMX,MR8,NNN, C_MMX+2,        "PUNPCKLWD" },
   { 0x00FFFF, 0x00620F, 2,00,  RMX,MR8,NNN, C_MMX+4,        "PUNPCKLDQ" },
   { 0x00FFFF, 0x00EF0F, 2,00,  RMX,MR8,NNN, C_MMX+0,        "PXOR" },
-  // AMD extentions to MMX command set (including Athlon/PIII extentions).
+  // AMD extensions to MMX command set (including Athlon/PIII extensions).
   { 0x00FFFF, 0x000E0F, 2,00,  NNN,NNN,NNN, C_MMX+0,        "FEMMS" },
   { 0x38FFFF, 0x000D0F, 2,00,  MD8,NNN,NNN, C_MMX+0,        "PREFETCH" },
   { 0x38FFFF, 0x080D0F, 2,00,  MD8,NNN,NNN, C_MMX+0,        "PREFETCHW" },
@@ -584,7 +584,7 @@ const t_cmddata cmddata[] = {
   { 0x00FFFF, 0x00F60F, 2,00,  RMX,MR8,NNN, C_MMX+1,        "PSADBW" },
   { 0x00FFFF, 0x00700F, 2,00,  RMX,MR8,IM1, C_MMX+2,        "PSHUFW" },
   { 0xFFFFFF, 0xF8AE0F, 2,00,  NNN,NNN,NNN, C_MMX+0,        "SFENCE" },
-  // AMD 3DNow! instructions (including Athlon extentions).
+  // AMD 3DNow! instructions (including Athlon extensions).
   { 0x00FFFF, 0xBF0F0F, 2,00,  RMX,MR8,NNN, C_NOW+1,        "PAVGUSB" },
   { 0x00FFFF, 0x9E0F0F, 2,00,  R3D,MRD,NNN, C_NOW+4,        "PFADD" },
   { 0x00FFFF, 0x9A0F0F, 2,00,  R3D,MRD,NNN, C_NOW+4,        "PFSUB" },

libr/asm/arch/x86/ollyasm/assembl.c

@@ -1059,7 +1059,7 @@ int Assemble(char *cmd,ulong ip,t_asmmodel *model,int attempt,
         case PS0:                      // Top of FPU stack (pseudooperand)
         case PS1:                      // ST(1) (pseudooperand)
         case PCX:                      // CX/ECX (pseudooperand)
-        case PDI:                      // EDI (pseudooperand in MMX extentions)
+        case PDI:                      // EDI (pseudooperand in MMX extensions)
           break;
         default:                       // Undefined type of operand
           strcpy(errtext,"Internal Assembler error");
@@ -1245,7 +1245,7 @@ int Assemble(char *cmd,ulong ip,t_asmmodel *model,int attempt,
             op->index>=0 && op->scale==2 &&
             op->offset>=-128 && op->offset<128 && op->anyoffset==0) {
             op->base=op->index; op->scale=1; };
-          if (op->index==GREG_ESP) {    // Reordering was unsuccessfull
+          if (op->index==GREG_ESP) {    // Reordering was unsuccessful
             strcpy(errtext,"Invalid indexing mode");
             goto error; };
           if (op->base<0) {
@@ -1298,7 +1298,7 @@ int Assemble(char *cmd,ulong ip,t_asmmodel *model,int attempt,
       case IMX:                        // Immediate sign-extendable byte
       case IMS:                        // Immediate byte (for shifts)
       case IM1:                        // Immediate byte
-        if (immsize==2)                // To accomodate ENTER instruction
+        if (immsize==2)                // To accommodate ENTER instruction
           immediate=(immediate & 0xFFFF) | (op->offset<<16);
         else immediate=op->offset;
         anyimm|=op->anyoffset;
@@ -1352,7 +1352,7 @@ int Assemble(char *cmd,ulong ip,t_asmmodel *model,int attempt,
       case PS0:                        // Top of FPU stack (pseudooperand)
       case PS1:                        // ST(1) (pseudooperand)
       case PCX:                        // CX/ECX (pseudooperand)
-      case PDI:                        // EDI (pseudooperand in MMX extentions)
+      case PDI:                        // EDI (pseudooperand in MMX extensions)
         break;                         // Simply skip preudooperands
       default:                         // Undefined type of operand
         strcpy(errtext,"Internal Assembler error");

libr/asm/arch/x86/ollyasm/disasm.c

@@ -1160,7 +1160,7 @@ ulong Disasm(const unsigned char *src,ulong srcsize,ulong srcip,
           DecodeST(1,1); break;
         case PCX:                      // CX/ECX (pseudooperand)
           DecodeRG(GREG_ECX,cxsize,PCX); break;
-        case PDI:                      // EDI (pseudooperand in MMX extentions)
+        case PDI:                      // EDI (pseudooperand in MMX extensions)
           DecodeRG(GREG_EDI,4,PDI); break;
         default:
           da->error=DAE_INTERN;        // Unknown argument type

libr/asm/arch/x86/ollyasm/disasm.h

@@ -57,7 +57,7 @@
 #undef SS
 // Special command features.
 #define WW             0x01            // Bit W (size of operand)
-#define SS             0x02            // Bit S (sign extention of immediate)
+#define SS             0x02            // Bit S (sign extension of immediate)
 #define WS             0x03            // Bits W and S
 #define W3             0x08            // Bit W at position 3
 #define CC             0x10            // Conditional jump
@@ -134,7 +134,7 @@
 #define PS0            (PSEUDOOP+5)    // Top of FPU stack (ST(0))
 #define PS1            (PSEUDOOP+6)    // ST(1)
 #define PCX            (PSEUDOOP+7)    // CX/ECX
-#define PDI            (PSEUDOOP+8)    // EDI (in MMX extentions)
+#define PDI            (PSEUDOOP+8)    // EDI (in MMX extensions)
 
 // Errors detected during command disassembling.
 #define DAE_NOERR      0               // No error

libr/asm/arch/z80/expressions.c

@@ -262,7 +262,7 @@ rd_label (const char **p, int *exists, struct label **previous, int level,
       /* not yet found */
       const char *old_p = *p;
 	  /* label does not exist, or is invalid.  This is an error if there
-	   * is no existance check.  */
+	   * is no existence check.  */
 	  if (!exists && print_errors)
 	    printerr (1, "using undefined label %.*s\n", *p - old_p, old_p);
 	  /* Return a value to discriminate between non-existing and invalid */

libr/bin/format/mach0/mach-o/loader.h

@@ -146,7 +146,7 @@ struct mach_header_64 {
 #define MH_FORCE_FLAT	0x100		/* the executable is forcing all images
 					   to use flat name space bindings */
 #define MH_NOMULTIDEFS	0x200		/* this umbrella guarantees no multiple
-					   defintions of symbols in its
+					   definitions of symbols in its
 					   sub-images so the two-level namespace
 					   hints can always be used. */
 #define MH_NOFIXPREBINDING 0x400	/* do not have dyld notify the

libr/bin/format/mach0/mach-o/nlist.h

@@ -284,7 +284,7 @@ struct nlist_64 {
 
 /*
  * The N_ARM_THUMB_DEF bit of the n_desc field indicates that the symbol is
- * a defintion of a Thumb function.
+ * a definition of a Thumb function.
  */
 #define N_ARM_THUMB_DEF	0x0008 /* symbol is a Thumb function (ARM) */
 

libr/bin/format/mach0/mach/machine.h

@@ -218,10 +218,10 @@ __END_DECLS
  *
  * The subtype definitions here are unusual for historical reasons.
  * NeXT used to consider 68030 code as generic 68000 code.  For
- * backwards compatability:
+ * backwards compatibility:
  *
  *	CPU_SUBTYPE_MC68030 symbol has been preserved for source code
- *	compatability.
+ *	compatibility.
  *
  *	CPU_SUBTYPE_MC680x0_ALL has been defined to be the same
  *	subtype as CPU_SUBTYPE_MC68030 for binary comatability.

libr/bin/mangling/cxx/ansidecl.h

@@ -1,4 +1,4 @@
-/* ANSI and traditional C compatability macros
+/* ANSI and traditional C compatibility macros
    Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
    2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
    Free Software Foundation, Inc.

libr/core/cmd_help.c

@@ -225,7 +225,7 @@ static int cmd_help(void *data, const char *input) {
 		const char* help_msg[] = {
 			"Usage: ?v [$.]","","",
 			"$$", "", "here (current virtual seek)",
-			"$?", "", "last comparision value",
+			"$?", "", "last comparison value",
 			"$alias", "=value", "Alias commands (simple macros)",
 			"$Cn", "", "get nth call of function",
 			"$Dn", "", "get nth data reference in function",

libr/core/cmd_print.c

@@ -371,7 +371,7 @@ static void cmd_print_format (RCore *core, const char *_input, int len) {
 
 // > pxa
 /* In this function, most of the buffers have 4 times
- * the required lenght. This is because we supports colours,
+ * the required length. This is because we supports colours,
  * that are 4 chars long. */
 #define append(x,y) { strcat (x,y);x += strlen (y); }
 static void annotated_hexdump(RCore *core, const char *str, int len) {
@@ -481,7 +481,7 @@ static void annotated_hexdump(RCore *core, const char *str, int len) {
 
 			// collect flags
 			flag = r_flag_get_i (core->flags, addr+j);
-			if (flag) { // Begining of a flag
+			if (flag) { // Beginning of a flag
 				if (flagsz) {
 					fend = addr + flagsz; //core->blocksize;
 				} else {

libr/core/cmd_search.c

@@ -549,7 +549,7 @@ static RList* construct_rop_gadget(RCore *core, ut64 addr, ut8 *buf, int idx, co
 
 			//Handle (possible) grep
 			if (search_hit) {
-				if (end[0] == ';') { // fields are semicolon-seperated
+				if (end[0] == ';') { // fields are semicolon-separated
 					start = end + 1; // skip the ;
 					end = strstr (start, ";");
 					end = end?end: start + strlen(start); //latest field?

libr/core/config.c

@@ -864,7 +864,7 @@ R_API int r_core_config_init(RCore *core) {
 	SETICB("anal.sleep", 0, &cb_analsleep, "Sleep some usecs before analyzing more. Avoid 100% cpu usage");
 	SETPREF("anal.hasnext", "true", "Continue analysis after each function");
 	SETPREF("anal.esil", "false", "Use the new ESIL code analysis");
-	SETCB("anal.nopskip", "true", &cb_analnopskip, "Skip nops at the begining of functions");
+	SETCB("anal.nopskip", "true", &cb_analnopskip, "Skip nops at the beginning of functions");
 	SETCB("anal.arch", R_SYS_ARCH, &cb_analarch, "Specify the anal.arch to use");
 	SETCB("anal.cpu", R_SYS_ARCH, &cb_analcpu, "Specify the anal.cpu to use");
 	SETPREF("anal.prelude", "", "Specify an hexpair to find preludes in code");

libr/core/p/core_anal.c

@@ -93,7 +93,7 @@ int analyzeIterative (RCore *core, Sdb *db, ut64 addr) {
 
 		switch (op->type) {
 		case R_ANAL_OP_TYPE_NOP:
-			/* If placed at the begining..just skip them */
+			/* If placed at the beginning..just skip them */
 			if (cur == 0) {
 				eprintf ("NOPSKIP %d\n", op->size);
 				oaddr += op->size;

libr/core/p/core_java.c

@@ -678,17 +678,17 @@ static int r_cmd_is_object_descriptor (const char *name, ut32 name_len) {
 }
 
 static char * r_cmd_replace_name (const char *s_new, ut32 replace_len, const char *s_old, ut32 match_len, const char *buffer, ut32 buf_len, ut32 *res_len) {
-	ut32 num_occurences = 0, i = 0;
+	ut32 num_occurrences = 0, i = 0;
 	char * result = NULL, *p_result = NULL;
 
-	num_occurences = r_cmd_get_num_classname_str_occ (buffer, s_old);
+	num_occurrences = r_cmd_get_num_classname_str_occ (buffer, s_old);
 	*res_len = 0;
-	if (num_occurences > 0 && replace_len > 0 && s_old) {
+	if (num_occurrences > 0 && replace_len > 0 && s_old) {
 		ut32 consumed = 0;
 		const char * next = r_cmd_get_next_classname_str (buffer+consumed, s_old);
 		IFDBG r_cons_printf ("Replacing \"%s\" with \"%s\" in: %s\n", s_old, s_new, buffer);
-		result = malloc (num_occurences*replace_len + buf_len);
-		memset (result, 0, num_occurences*replace_len + buf_len);
+		result = malloc (num_occurrences*replace_len + buf_len);
+		memset (result, 0, num_occurrences*replace_len + buf_len);
 		p_result = result;
 		while (next && consumed < buf_len) {
 			// replace up to next
@@ -793,7 +793,7 @@ static int r_cmd_java_handle_replace_classname_value (RCore *core, const char *c
 		ut16 len = 0;
 		if (cp_obj && cp_obj->tag == R_BIN_JAVA_CP_UTF8 &&
 			cp_obj->info.cp_utf8.length && cp_obj->info.cp_utf8.length >= class_name_len-1) {
-			ut32 num_occurences = 0;
+			ut32 num_occurrences = 0;
 			ut64 addr = cp_obj->file_offset + cp_obj->loadaddr;
 			buffer = r_bin_java_cp_get_idx_bytes (obj, idx, &buffer_sz);
 
@@ -803,9 +803,9 @@ static int r_cmd_java_handle_replace_classname_value (RCore *core, const char *c
 			memcpy (name, buffer+3, len);
 			name[len] = 0;
 
-			num_occurences = r_cmd_get_num_classname_str_occ (name, class_name);
+			num_occurrences = r_cmd_get_num_classname_str_occ (name, class_name);
 
-			if (num_occurences > 0) {
+			if (num_occurrences > 0) {
 				// perform inplace replacement
 				ut32 res_len = 0;
 				char * result = NULL;

libr/hash/xxhash.c

@@ -36,7 +36,7 @@
 // Tuning parameters
 //**************************************
 // FORCE_NATIVE_FORMAT :
-// By default, xxHash library provides endian-independant Hash values.
+// By default, xxHash library provides endian-independent Hash values.
 // Results are therefore identical for big-endian and little-endian CPU.
 // This comes at a  performance cost for big-endian CPU, since some swapping is required to emulate little-endian format.
 // Should endian-independance be of no importance to your application, you may uncomment the #define below

libr/include/r_anal.h

@@ -532,7 +532,7 @@ typedef struct r_anal_t {
 	int big_endian;
 	int split; // used only from core
 	int sleep; // sleep some usecs before analyzing more (avoid 100% cpu usages)
-	int nopskip; // skip nops at the begining of functions
+	int nopskip; // skip nops at the beginning of functions
 	void *user;
 	ut64 gp; // global pointer. used for mips. but can be used by other arches too in the future
 	RList *fcns;

libr/include/r_socket.h

@@ -135,7 +135,7 @@ typedef struct r_socket_rap_server_t {
 	rap_server_cmd system;
 	rap_server_cmd cmd;
 	rap_server_close close;
-	void *user;					//Allways first arg for callbacks
+	void *user;					//Always first arg for callbacks
 } RSocketRapServer;
 
 R_API RSocketRapServer *r_socket_rap_server_new (int is_ssl, const char *port);

libr/io/vio.c

@@ -42,7 +42,7 @@ point to a given physical address from a virtual one.
 #define isInMapRange(m,x)	((m->from <= x) && (x <= m->to))
 
 /* Idea: At first, get all sections in vrange, meanwhile record all unsectioned area and store it via RIORange in a list,
-read all sections via mread, resolve maps for unsectioned areas and fill the gaps. last point must allways prefere using io->desc*/
+read all sections via mread, resolve maps for unsectioned areas and fill the gaps. last point must always prefere using io->desc*/
 R_API int r_io_vread (RIO *io, ut64 vaddr, ut8 *buf, int len) {
 	int tmp_len = len;
 	ut8 *tmp_buf = buf;
@@ -104,7 +104,7 @@ R_API int r_io_vread (RIO *io, ut64 vaddr, ut8 *buf, int len) {
 				r_io_mread (io, map->fd, tmp_vaddr, tmp_buf, tmp_len);	//read from maps, the ranges will adjusted in mread
 			}
 			r_list_free (maps);					//free the list for the next iteration
-			r_io_mread (io, io->desc->fd, tmp_vaddr, tmp_buf, tmp_len);	//ensure that io->desc is allways on the top
+			r_io_mread (io, io->desc->fd, tmp_vaddr, tmp_buf, tmp_len);	//ensure that io->desc is always on the top
 		}
 		r_list_free (ranges);
 	} else {
@@ -113,7 +113,7 @@ R_API int r_io_vread (RIO *io, ut64 vaddr, ut8 *buf, int len) {
 			r_io_mread (io, map->fd, vaddr, buf, len);		//read from the maps, the ranges will be adjusted in mread
 		}
 		r_list_free (maps);						//free the list
-		r_io_mread (io, io->desc->fd, vaddr, buf, len);			//ensure that io->desc is allways on the top
+		r_io_mread (io, io->desc->fd, vaddr, buf, len);			//ensure that io->desc is always on the top
 	}
 	return R_TRUE;
 }