The bcm2708 SPI driver's bcm2708_process_transfer() was ignoring the per-transfer speed_hz value even when it was provided (it always just used the spi device's max_speed_hz value). Now, per-transfer speed_hz values are respected. Also added debug print to bcm2708_setup_state() to help keep an eye on the configured SPI parameters. Signed-off-by: Kamal Mostafa <firstname.lastname@example.org>
…tg USB driver. Enable through /proc/dwc_sof/SOF_reduction" This reverts commit 85b7821.
…status=0 may improve interrupt latency
There are issues with both single block reads (missed completion) and writes (data loss in some cases!). Just don't do single block transfers anymore, and treat them like multiblock transfers. This adds a quirk for this and uses it.
The additional FIFO might speed up transfers in some cases.
The calculated values somehow don't agree with the sched_clock code and we end up with warnings like: sched_clock: wrong multiply/shift: 2097152000>>21 vs calculated 4194304000>>22 sched_clock: fix multiply/shift to avoid scheduler hiccups So use the constant values much like arch/arm/mach-tegra/timer.c does. Signed-off-by: Chris Boot <email@example.com>
Not sure what the original code was trying to do as it was completely wrong on many levels. This patch fixes the macro to return the correct physical and virtual addresses of the PL011 UART on the RPi. Note that you need to boot the compressed kernel (zImage) so that the UART is configured at boot, or your kernel will hang when it tries to access the UART. Signed-off-by: Chris Boot <firstname.lastname@example.org>
The dwc_common_port library used by the dwc_otg includes bignumber and crypto functions which require 64x64 multiplication functions. Remove this dead code. Signed-off-by: Chris Boot <email@example.com>
This reverts commit 7e76958.
…ething we can reliably recover from, so down_interruptable is not a safe call.
…after line 264 add these two lines: CONFIG_CHR_DEV_ST=m CONFIG_CHR_DEV_OSST=m