Cortex-M3 system-level Forth code
Forth
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.gitignore
CortexM0Atomic.fth
CortexM3Atomic.fth
README.md
aapcs.fth
bitband.fth
cyclecounter.fth
debugging.fth
idlewfi.fth
lm3s_gpio.fth
lm3s_peripherals.fth
lm3s_rom.fth
locking.fth
mpu.fth
nvic.fth
patch.bbstatus
pause.fth
rev.fth
tasks-mpe.fth
wfi.fth

README.md

cm3forthtools

Cortex-M0/M3/M4 system-level Forth code


  • CortexM0Atomic.fth - Atomic read-modify-writes (Interrupt disabling)
  • CortexM0Atomic.fth - Atomic read-modify-writes (LDREX/STREX based)
  • aapcs.fth - Arm Architecture Procedure Calling Standards shims for calling C
  • bitband.fth - Words for using Cortex-M3 Bit-banding
  • cyclecounter.fth - Enabling/Useing the CPU Cycle counter in later M3s
  • locking.fth - LDREX/STREX locking primitives and 64-Bit coherent reads.
  • nvic.fth - Words for manipulating the NVIC and triggering reset
  • pause.fth - Modified MPE Scheduler with support for WFI
  • rev.fth - Bit Reverse and Halfword reverse words.
  • wfi.fth - Convenience word for using WFI