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GPU extension for RISCV 32
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AsmParser
Disassembler
InstPrinter
MCTargetDesc
TargetInfo
Utils
docs
lib/Target/RISCV
test/MC/RISCV
CMakeLists.txt
GSoCWorkSubmission.md
LLVMBuild.txt
README.md
RISCV.h
RISCV.td
RISCVAsmPrinter.cpp
RISCVCallingConv.td
RISCVExpandPseudoInsts.cpp
RISCVFrameLowering.cpp
RISCVFrameLowering.h
RISCVISelDAGToDAG.cpp
RISCVISelLowering.cpp
RISCVISelLowering.h
RISCVInstrFormats.td
RISCVInstrFormatsC.td
RISCVInstrInfo.cpp
RISCVInstrInfo.h
RISCVInstrInfo.td
RISCVInstrInfoA.td
RISCVInstrInfoC.td
RISCVInstrInfoD.td
RISCVInstrInfoF.td
RISCVInstrInfoM.td
RISCVMCInstLower.cpp
RISCVMachineFunctionInfo.h
RISCVMergeBaseOffset.cpp
RISCVRegisterInfo.cpp
RISCVRegisterInfo.h
RISCVRegisterInfo.td
RISCVSubtarget.cpp
RISCVSubtarget.h
RISCVSystemOperands.td
RISCVTargetMachine.cpp
RISCVTargetMachine.h
RISCVTargetObjectFile.cpp
RISCVTargetObjectFile.h

README.md

RISCV32 GPU ISA

64 bit pointers in RV32 using custom load/store in different address space.

Getting Started

Start with cloning the llvm-project

$ git clone https://github.com/llvm/llvm-project.git -b llvmorg-8.0.0 

Replace the RISCV target backend with our fork

$ cd llvm-project/llvm/lib/Target
$ rm -rf RISCV
$ git clone this-repo RISCV

Update the updated data layout string to "e-m:e-p:32:32-p:64:32-i64:64-n32-S128" in clang to match the backend here

Build LLVM with Clang, till version 8.x RISCV was an experimental target!

$ cd llvm-project
$ mkdir build & cd build
$ cmake -DLLVM_ENABLE_PROJECTS=clang  -DCMAKE_BUILD_TYPE=Debug -DLLVM_TARGETS_TO_BUILD="X86" -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="RISCV" -DLLVM_USE_LINKER=gold -DLLVM_ENABLE_Z3_SOLVER=OFF ../llvm
$ make 
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