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Break 64 bit GlobalAddress in address space 1 into a pair of i32 values

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reSHARMA committed Jul 31, 2019
1 parent 26d66f6 commit 6dbaa4b79c594431a71c78ae4ce81f16905666fe
Showing with 43 additions and 0 deletions.
  1. +40 −0 RISCVISelLowering.cpp
  2. +3 −0 RISCVISelLowering.h
@@ -113,6 +113,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::CTLZ, XLenVT, Expand);
setOperationAction(ISD::CTPOP, XLenVT, Expand);

setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);

ISD::CondCode FPCCToExtend[] = {
ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETO, ISD::SETUEQ,
ISD::SETUGT, ISD::SETUGE, ISD::SETULT, ISD::SETULE, ISD::SETUNE,
@@ -539,6 +541,44 @@ static bool isVariableSDivUDivURem(SDValue Val) {
}
}

void RISCVTargetLowering::ReplaceNodeResults(SDNode *Node,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) const {
SDLoc DL(Node);
switch (Node->getOpcode()) {
default:
llvm_unreachable(
"Don't know how to custom type legalize this "
"operation!");
case ISD::UNDEF: {
SDValue un = DAG.getNode(ISD::UNDEF, DL, MVT::i32);
Results.push_back(un);
break;
}
case ISD::GlobalAddress: {
GlobalAddressSDNode *N =
cast<GlobalAddressSDNode>(Node);
const GlobalValue *GV = N->getGlobal();
int64_t Offset = N->getOffset();
if (N->getAddressSpace() == 1) {
SDValue GALoHi = DAG.getTargetGlobalAddress(GV, DL, MVT::i32, 0, RISCVII::MO_LOHI);
SDValue GALoLo = DAG.getTargetGlobalAddress(GV, DL, MVT::i32, 0, RISCVII::MO_LOLO);
SDValue MNHi = SDValue(DAG.getMachineNode(RISCV::LUI, DL, MVT::i32, GALoHi), 0);
SDValue MNLo = SDValue(DAG.getMachineNode(RISCV::ADDI, DL, MVT::i32, MNHi, GALoLo), 0);

SDValue GAHi = DAG.getTargetGlobalAddress(GV, DL, MVT::i32, 0, RISCVII::MO_HI);
SDValue GALo = DAG.getTargetGlobalAddress(GV, DL, MVT::i32, 0, RISCVII::MO_LO);
SDValue tempMNHi = SDValue(DAG.getMachineNode(RISCV::LUI, DL, MVT::i32, GAHi), 0);
SDValue tempMNLo = SDValue(DAG.getMachineNode(RISCV::ADDI, DL, MVT::i32, tempMNHi, GALo), 0);

SDValue result = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, MNLo, tempMNLo);
Results.push_back(result);
}
break;
}
}
}

SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
DAGCombinerInfo &DCI) const {
SelectionDAG &DAG = DCI.DAG;
@@ -58,6 +58,9 @@ class RISCVTargetLowering : public TargetLowering {

// Provide custom lowering hooks for some operations.
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;

void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) const override;

SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;

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