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Intransitive: Auto-discovery of intrinsic instruction translations

Example IR-level equivalence generated by Intransitive

Example IR-level equivalence discovered by Intransitive

Intransitive generates rules to collapse sequences of LLVM vector IR intrinsics into shorter sequences of equivalent (wider) operations. This is done via testbed generation, randomized testing of input bit sequences, and testing with combinatorially generated corner-case bit sequences.

We tested 18,000 such inputs on an Intel Skylake Xeon processor with AVX-512 support. In our tests, Intransitive discovered 53 SSE-series to AVX1/2 intrinsic conversions, 33 AVX1/2 to AVX-512 conversions, and 19 SSE-series to AVX-512 conversions. For instance, the SSE4.1 intrinsic _mm_packus_epi32 has a 2-to-1 conversion to _mm256_packus_epi32 and a 4-to-1 conversion to _mm512_packus_epi32.

See Revec: Program Rejuventation through Revectorization for details on the equivalence generation process.

Generation process:

Set up a virtual environment

python3 -m venv env
source env/bin/activate
pip install -r requirements.txt

Enumeration process

# Generate intrinsics_all.json from (TableGen file from LLVM source)

# Test all intrinsics through a range of repetitions for different seeds / edge cases
./ 0 6500

# Parse test run log output (stored in logs/) and filter to find equivalent intrinsics

# Generate a header file that encodes discovered equivalences


If needed, can be regenerated from intrinsic definitions in the LLVM source. This is necessary when intrinsic definitions in the LLVM source change -- particularly when include/llvm/IR/ or include/llvm/IR/ change. From the root of the LLVM source repository (e.g. a clone of, execute:

llvm-tblgen include/llvm/IR/ -Iinclude > /path/to/output/

For example,

/mnt/revec/build-master/bin/llvm-tblgen include/llvm/IR/ -Iinclude > ../enum/

This repository currently contains definitions generated from LLVM's release_60 branch.


Intransitive discovers equivalences between sequences of intrinsic instructions via randomized and corner-case testing






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