Skip to content
Light-weight RISC-V RV32IMC microcontroller core.
Branch: master
Clone or download
Latest commit e5811f8 Mar 4, 2017
Type Name Latest commit message Commit time
Failed to load latest commit information.
firmware Update Makefile Feb 12, 2017
scripts/kamikaze_test fetch: jump-unaligned by 4 address waiting support Feb 12, 2017
src pipeline works Mar 4, 2017
.gitignore fetch: Almost done Feb 11, 2017 Update Feb 11, 2017


Light-weight RV32IMC core for FPGA or ASIC.


It realized a RISC-V 32bit core by 4-stage pipeline. It aims to replace Cortex-M3.

Currently is not usable, working in progress.


RISC-V RV32IMC instruction set compatible.

I will add some instruction to enhance it's performance, if I have enough time working on it.

Harvard architecture which features I-bus and D-bus.

Small footprint for small FPGA or ASIC.

AHB-Lite or AXI bus wrapper.

Debug supported. The debug register will mapped on MMIO(APB interface), and support debug externally from special UART.


Zhiyuan Wan



You can’t perform that action at this time.