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[Request] - RISC-V Visual Tools #9

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ajithpv opened this issue Dec 15, 2023 · 2 comments · Fixed by #15
Closed

[Request] - RISC-V Visual Tools #9

ajithpv opened this issue Dec 15, 2023 · 2 comments · Fixed by #15
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enhancement New feature or request

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@ajithpv
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ajithpv commented Dec 15, 2023

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Ajith P V, ajithpv@outlook.com

Request Details

It would be better to add one more section for some of the best visual tools that helps to understand the RISC-V in a better way.
These tools can be used during the beginner or intermediate tutorials to get the visualization of the RISC-V ISA.

Example:

  1. emulsiV:
    emulsiV is a visual simulator for a simple RISC processor called Virgule.
    Virgule is a 32-bit RISC processor core that implements a minimal subset of the RISC-V instruction set. Here, “minimal” means that Virgule accepts only the instructions that a C compiler would generate from a pure stand-alone C program.

  2. RISC-V Instruction Encoder/Decoder:
    This tool is an online encoder/decoder for RISC-V instructions. Users can input RISC-V instructions in their assembly or binary format and get the full conversion from one to the other.

@ajithpv ajithpv added the enhancement New feature or request label Dec 15, 2023
@KuthumiPepple
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Thanks for your submission. A section for visualization tools sounds good. I'll add that and request for a review from you.

@KuthumiPepple
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KuthumiPepple commented Dec 20, 2023

I have added these tools to a new Softwares and Tools resource category. If you have thoughts on this, you can still comment here even after this issue gets closed.

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3 participants