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Make su suffix for widening operations consistent. #426

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Make su suffix for widening operations consistent. #426

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David-Horner
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su should mean signed(vs2) for all opcodes. Thus unsigned(vs1/rs1).

Also fix a line wrap formatting problem.

Signed-off-by: David Horner ds2horner@gmail.com

su should mean signed(vs2) for all opcodes. Thus unsigned(vs1/rs1).

Also fix a line wrap formatting problem.

Signed-off-by: David Horner <ds2horner@gmail.com>
@David-Horner
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su suffix is Signed(vs2) here

.# Signed(vs2)-Unsigned multiply, returning high bits of product
vmulhsu.vv vd, vs2, vs1, vm # Vector-vector
vmulhsu.vx vd, vs2, rs1, vm # vector-scalar

This makes it clear that excluding signed(rs1) was intentional:

Note | There is no vmulhus opcode to return high half of unsigned-vector * signed-scalar product.

also note when extension is .vv reversing the vector register assignments of vs1 and vs2 effectively changes su to us.

su is signed(vs1/rs1) here

.# Widening signed-unsigned-integer multiply-add, overwrite addend
vwmaccsu.vv vd, vs1, vs2, vm # vd[i] = +(signed(vs1[i]) * unsigned(vs2[i])) + vd[i]
vwmaccsu.vx vd, rs1, vs2, vm # vd[i] = +(signed(x[rs1]) * unsigned(vs2[i])) + vd[i]

and here:

.# Quad-widening signed-unsigned-integer multiply-add, overwrite addend
vqmaccsu.vv vd, vs1, vs2, vm # vd[i] = +(signed(vs1[i]) * unsigned(vs2[i])) + vd[i]
vqmaccsu.vx vd, rs1, vs2, vm # vd[i] = +(signed(x[rs1]) * unsigned(vs2[i])) + vd[i]

and thus su suffix is ambiguous here:

.# Widening signed-unsigned integer multiply
vwmulsu.vv vd, vs2, vs1, vm # vector-vector
vwmulsu.vx vd, vs2, rs1, vm # vector-scalar

The complimentary us suffix exists for the two "su is signed(vs1/rs1)" variants:

.# Widening unsigned-signed-integer multiply-add, overwrite addend
vwmaccus.vx vd, rs1, vs2, vm # vd[i] = +(unsigned(x[rs1]) * signed(vs2[i])) + vd[i]

and

.# Quad-widening unsigned-signed-integer multiply-add, overwrite addend
vqmaccus.vx vd, rs1, vs2, vm # vd[i] = +(unsigned(x[rs1]) * signed(vs2[i])) + vd[i]

Thus the accidental inversion for vwmaccsu and vqmaccsu would not be blatant.

The opcode encoding doesn't give much guidance:

op bin V X I opcode op bin V X opcode
100100 100100 V X vmulhu
100101 V X I vsll 100101 V X vmul
100110 100110 V X vmulhsu
100111 V X vsmul 100111 V X vmulh
op bin V X I opcode op bin V X opcode
111000 V vdotu 111000 V X vwmulu
111001 V vdot 111001
111010 111010 V X vwmulsu
111011 111011 V X vwmul
op bin V X I opcode op bin V X opcode
111100 V X vqmaccu 111100 V X vwmaccu
111101 V X vqmacc 111101 V X vwmacc
111110 X vqmaccus 111110 X vwmaccus
111111 V X vqmaccsu 111111 V X vwmaccsu

However, given that vmulhus was intentionally excluded, and to the extent that the last bit in the encoding is significant, then it follows that vwmulsu should be signed(vs2).
And it would follow for consistency that vwmaccsu and vqmaccsu should also be signed(vs2).
Thus the (literally) last two lines in the encoding should be :

op bin V X I opcode op bin V X opcode
111110 V X vqmaccsu 111110 V X vwmaccsu
111111 X vqmaccus 111111 X vwmaccus

I therefore propose that su suffix is signed(vs2) in all cases, and I will propose a patch to incorporate these changes.

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