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riscware

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  1. verilator verilator Public

    Forked from verilator/verilator

    Verilator open-source SystemVerilog simulator and lint system

    C++

  2. riscv-opcodes riscv-opcodes Public

    Forked from riscv/riscv-opcodes

    RISC-V Opcodes

    Python 2

  3. pyenv pyenv Public

    Forked from pyenv/pyenv

    Simple Python version management

    Roff

  4. cvw cvw Public

    Forked from openhwgroup/cvw

    CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

    SystemVerilog

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