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An UGV-system using SoC-FPGA developed for FPGA design competition held on ICFPT2019

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rits-drsl/ZybotR2-96-fpt19

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ZybotR2-96-fpt19

An UGV-system using SoC-FPGA developed for FPGA design competition held on ICFPT2019.

Our team won first place! πŸŽ‰ πŸŽ‰ πŸŽ‰

ZybotR2-96

Features

  • Localization and Motion Planning are implemented in the UGV-system

    • In the Localization process, observations such as Wheel Odometry are fusioned by Particle Filter
    • In the Motion Planning process, Informed-RRT*, Pure Pursuit, and PID control are used debug
  • Efficient data flow that image data captured by image sensor are processed by FPGA before transferring to DRAM

  • Peripheral devices (e.g. DC motor) can be handled transparently from Zynq PS by a system that synchronize registers between multiple FPGAs with UART

architecture

  • The UGV-system is divided into five layers, and it is descending order of abstraction

system_layer

Main Parts of The Vehicle

Repository Structure

A part of this repository structure is shown below:

ZybotR2-96-fpt19
β”œβ”€β”€ assets
β”‚Β Β  β”œβ”€β”€ cad
β”‚Β Β  β”œβ”€β”€ script
β”‚Β Β  └── tools
β”œβ”€β”€ cmod-a7
β”‚Β Β  └── vivado
β”‚Β Β      β”œβ”€β”€ prj
β”‚Β Β      └── src
└── ultra96
    β”œβ”€β”€ BOOT_FS
    β”œβ”€β”€ ROOT_FS
    β”‚Β Β  β”œβ”€β”€ app
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ fad
    β”‚Β Β  β”‚Β Β  └── other
    β”‚Β Β  β”œβ”€β”€ driver
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ cp210x
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ usbserial
    β”‚Β Β  β”‚Β Β  └── v4l2
    β”‚Β Β  β”œβ”€β”€ dts
    β”‚Β Β  β”œβ”€β”€ firmware
    β”‚Β Β  β”œβ”€β”€ lib
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ control
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ improc
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ optor
    β”‚Β Β  β”‚Β Β  β”œβ”€β”€ planner
    β”‚Β Β  β”‚Β Β  └── zynqpl
    β”‚Β Β  └── package
    └── vivado
        β”œβ”€β”€ ip
        β”œβ”€β”€ prj
        └── src
  • assets/
    • 3DCAD data for the vehicle parts, scripts which install libraries such as OpenCV, and tools are stored
  • cmod/vivado/
    • RTL files and scripts which create project are stored
    • A Registers synchronization module, a motor controller, and an OLED controller are implemented
  • ultra96/BOOT_FS/
    • Binary files for booting Linux on Ultra96 are stored
    • These files are prepared with reference to ikwzm/ZynqMP-FPGA-Linux
  • ultra96/ROOT_FS/app/
    • An application of FAD(FPGA Autonomous Driving), test applications of devices, and so on are stored
  • ultra96/ROOT_FS/lib/
  • ultra96/ROOT_FS/driver/
    • Device drivers are stored
    • v4l2 which is Linux V4L2 driver which deals with the Xilinx VDMA IP is prepared with reference to fixstars/ultra96_design
  • ultra96/ROOT_FS/dts/
    • DTS(Device Tree Source) files are stored
    • We reflect some of device information to kernel using Device Tree Overlay which is feature of Linux kernel
  • ultra96/ROOT_FS/firmware/
    • A bitstream file and firmware of wireless LAN modules are stored
    • A bitstream file is loaded with FPGA Region which is feature of Linux kernel
  • ultra96/ROOT_FS/package/
    • Debian packages of linux-headers and linux-image are stored
    • There are also prepared with reference to ikwzm/ZynqMP-FPGA-Linux
  • ultra96/vivado/

Future Work

  • Offload computation heavy processes such as Informed-RRT*, Particle Filter, path tracking algorithms, and calculating Visual Odometry
  • Implement more accurate image recognition algorithms

Links

Authors

References

Y. Kudo, A. Takada, Y. Ishida, and T. Izumi, "An SoC-FPGA-based Micro UGV with Localization and Motion Planning," in Proceedings of 2019 International Conference on Field-Programmable Technology (ICFPT), 2019, pp. 469-472.

License

MIT