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Commits on Sep 17, 2013
  1. @VaibhavBedia-xx

    ARM: OMAP2+: AM33XX: Basic suspend resume support

    VaibhavBedia-xx committed with Russ Dill
    AM335x supports various low power modes as documented
    in section of the AM335x TRM which is available
    DeepSleep0 mode offers the lowest power mode with limited
    wakeup sources without a system reboot and is mapped as
    the suspend state in the kernel. In this state, MPU and
    PER domains are turned off with the internal RAM held in
    retention to facilitate resume process. As part of the boot
    process, the assembly code is copied over to OCMCRAM using
    the OMAP SRAM code.
    AM335x has a Cortex-M3 (WKUP_M3) which assists the MPU
    in DeepSleep0 entry and exit. WKUP_M3 takes care of the
    clockdomain and powerdomain transitions based on the
    intended low power state. MPU needs to load the appropriate
    WKUP_M3 binary onto the WKUP_M3 memory space before it can
    leverage any of the PM features like DeepSleep.
    The IPC mechanism between MPU and WKUP_M3 uses a mailbox
    sub-module and 8 IPC registers in the Control module. MPU
    uses the assigned Mailbox for issuing an interrupt to
    WKUP_M3 which then goes and checks the IPC registers for
    the payload. WKUP_M3 has the ability to trigger on interrupt
    to MPU by executing the "sev" instruction.
    In the current implementation when the suspend process
    is initiated MPU interrupts the WKUP_M3 to let it know about
    the intent of entering DeepSleep0 and waits for an ACK. When
    the ACK is received MPU continues with its suspend process
    to suspend all the drivers and then jumps to assembly in
    OCMC RAM. The assembly code puts the PLLs in bypass, puts the
    external RAM in self-refresh mode and then finally execute the
    WFI instruction. Execution of the WFI instruction triggers another
    interrupt to the WKUP_M3 which then continues wiht the power down
    sequence wherein the clockdomain and powerdomain transition takes
    place. As part of the sleep sequence, WKUP_M3 unmasks the interrupt
    lines for the wakeup sources. WFI execution on WKUP_M3 causes the
    hardware to disable the main oscillator of the SoC.
    When a wakeup event occurs, WKUP_M3 starts the power-up
    sequence by switching on the power domains and finally
    enabling the clock to MPU. Since the MPU gets powered down
    as part of the sleep sequence in the resume path ROM code
    starts executing. The ROM code detects a wakeup from sleep
    and then jumps to the resume location in OCMC which was
    populated in one of the IPC registers as part of the suspend
    The low level code in OCMC relocks the PLLs, enables access
    to external RAM and then jumps to the cpu_resume code of
    the kernel to finish the resume process.
    Signed-off-by: Vaibhav Bedia <>
    Signed-off-by: Dave Gerlach <>
    Signed-off-by: Russ Dill <>
    Cc: Tony Lingren <>
    Cc: Santosh Shilimkar <>
    Cc: Benoit Cousson <>
    Cc: Paul Walmsley <>
    Cc: Kevin Hilman <>
  2. ARM: OMAP2+: AM33XX: Add PIE support for AM33XX

    Russ Dill committed
    This enables CONFIG_PIE for omap2plus_defconfig and adds
    an am33xx PIE section group. This is necessary for am33xx
    suspend/resume code as it is written in C.
    Signed-off-by: Russ Dill <>
  3. ARM: dts: AM33XX: Associate SRAM with MPU and mark it exec

    Russ Dill committed
    The SRAM is for use by the MPU. Marking it as such makes it
    easier for PM initialization code to locate the SRAM in order to
    load a PIE section into it.
    Additionally, set the map-exec flag to allow code to be run
    from SRAM. This is necessary for suspend/resume.
    Signed-off-by: Russ Dill <>
  4. ARM: PIE: Add macro for generating PIE resume trampoline

    Russ Dill committed
    Add a helper that generates a short snippet of code that updates PIE
    relocations, loads the stack pointer and calls a C (or asm) function.
    The code gets placed into a PIE section.
    Signed-off-by: Russ Dill <>
  5. ARM: PIE: Add support for updating PIE relocations

    Russ Dill committed
    This adds support for updating PIE relocations under ARM. This
    is necessary in the case that the same PIE must run both with
    virtual mapping (MMU enabled) and physical mapping (MMU
    Signed-off-by: Russ Dill <>
  6. ARM: PIE: Add position independent executable embedding to ARM

    Russ Dill committed
    Add support to ARM for embedding PIEs into the kernel, loading them into
    genalloc pools (such as SRAM) and executing them. Support for ARM means
    performing R_ARM_RELATIVE fixups within the .rel.dyn section.
    Signed-off-by: Russ Dill <>
  7. PIE: Support embedding position independent executables

    Russ Dill committed
    This commit adds support for embedding PIEs into the kernel, loading them
    into genalloc sections, performing necessary relocations, and running code
    from them. This allows platforms that need to run code from SRAM, such
    an during suspend/resume, to develop that code in C instead of assembly.
    Functions and data for each PIE should be grouped into sections with the
    __pie(<group>) and __pie_data(<group>) macros respectively. Any symbols or
    functions that are to be accessed from outside the PIE should be marked with
    EXPORT_PIE_SYMBOL(<sym>). For example:
    static struct ddr_timings xyz_timings __pie_data(platformxyz) = {
    void __pie(platformxyz) xyz_ddr_on(void *addr)
    While the kernel can access exported symbols from the PIE, the PIE cannot
    access symbols from the kernel, but can access data from the kernel and
    call functions in the kernel so long as addresses are passed into the PIE.
    PIEs are loaded from the kernel into a genalloc pool with pie_load_sections.
    pie_load_sections allocates space within the pool, copies the neccesary
    code/data, and performs any necessary relocations. A chunk identifier is
    returned for removing the PIE from the pool, and for translating symbols.
    Because the PIEs are dynamically relocated, special accessors must be used
    to access PIE symbols from kernel code:
    - kern_to_pie(chunk, ptr):   Translate a PIE symbol to the virtual address
                                 it is loaded into within the pool.
    - fn_to_pie(chunk, ptr):     Same as above, but for function pointers.
    - sram_to_phys(chunk, addr): Translate a virtual address within a loaded PIE
                                 to a physical address.
    Loading a PIE involves three main steps. First a set of common functions to
    cover built-ins emitted by gcc (memcpy, memmove, etc) is copied into the pool.
    Then the actual PIE code and data is copied into the pool. Because the PIE
    code is contained within an overlay with other PIEs, offsets to the common
    functions are maintained. Finally, relocations are performed as necessary.
    Signed-off-by: Russ Dill <>
  8. asm-generic: fncpy: Add function copying macros

    Russ Dill committed
    Under certain arches (ARM) function pointers cannot be
    used naively. Specifically, for thumb functions, their 0 bit
    is set, but they are contained on a word aligned address.
    Add a fncpy macro to perform function copies correctly
    along with two helpers, fnptr_to_address, and fnptr_translate.
    Signed-off-by: Russ Dill <>
  9. misc: SRAM: Add option to map SRAM to allow code execution

    Russ Dill committed
    This is necessary for platforms that use SRAM to execute suspend/resume stubs.
    Signed-off-by: Russ Dill <>
  10. lib: devres: Add exec versions of devm_ioremap_resource and friends

    Russ Dill committed
    Now that there is an _exec version of ioremap, add devm support for it.
    Signed-off-by: Russ Dill <>
  11. asm-generic: io: Add exec versions of ioremap

    Russ Dill committed
    If code is to be copied into and area (such as SRAM) and run,
    it needs to be marked as exec. Currently only an ARM version
    of this exists.
    Signed-off-by: Russ Dill <>
  12. @VaibhavBedia-xx

    ARM: OMAP: omap_device: Add APIs to enable and idle hwmods

    VaibhavBedia-xx committed with Russ Dill
    Needed to let the AM335x PM handle the IPs which need forced
    standby transition during every suspend-resume cycle when
    the corresponding driver is not compiled into the kernel.
    Signed-off-by: Vaibhav Bedia <>
    Signed-off-by: Dave Gerlach <>
  13. @VaibhavBedia-xx

    ARM: OMAP2+: timer: Add suspend-resume callbacks for clkevent device

    VaibhavBedia-xx committed with Russ Dill
    OMAP timer code registers two timers - one as clocksource
    and one as clockevent. Since AM33XX has only one usable timer
    in the WKUP domain one of the timers needs suspend-resume
    support to restore the configuration to pre-suspend state.
    commit adc78e6 (timekeeping: Add suspend and resume
    of clock event devices) introduced .suspend and .resume
    callbacks for clock event devices. Leverages these
    callbacks to have AM33XX clockevent timer which is
    in not in WKUP domain to behave properly across system
    Signed-off-by: Vaibhav Bedia <>
    Signed-off-by: Dave Gerlach <>
  14. @VaibhavBedia-xx

    ARM: OMAP2+: AM33XX: Reserve memory to comply with EMIF spec

    VaibhavBedia-xx committed with Russ Dill
    SDRAM controller on AM33XX requires that a modification of certain
    bit-fields in PWR_MGMT_CTRL register (ref. section in
    AM335x-Rev H) is followed by a dummy read access to SDRAM. This
    scenario arises when entering a low power state like DeepSleep.
    To ensure that the read is not from a cached region we reserve
    some memory during bootup using the arm_memblock_steal() API.
    A subsequent patch will pass along the location of the reserved
    memory location to the AM335x suspend handler which modifies the
    PWR_MGMT_CTRL register in the EMIF.
    Signed-off-by: Vaibhav Bedia <>
    Signed-off-by: Dave Gerlach <>
  15. @VaibhavBedia-xx

    ARM: OMAP: DTB: Update IRQ data for WKUP_M3

    VaibhavBedia-xx committed with Russ Dill
    Allow interrupt for wkup_m3 to be set from DT.
    Signed-off-by: Vaibhav Bedia <>
    Signed-off-by: Dave Gerlach <>
    Cc: Benoit Cousson <>
  16. @VaibhavBedia-xx

    ARM: OMAP2+: AM33XX: control: Add some control module registers and APIs

    VaibhavBedia-xx committed with Russ Dill
    Interacting with WKUP-M3 requires some more control
    module register writes. Add the register offsets and
    APIs to write to these.
    Signed-off-by: Vaibhav Bedia <>
    Signed-off-by: Dave Gerlach <>
  17. @dgerlach

    memory: emif: Move EMIF register defines to include/linux/

    dgerlach committed with Russ Dill
    OMAP4 and AM33XX share the same EMIF controller IP. Although there
    are significant differences in the IP integration due to which
    AM33XX can't reuse the EMIF driver DVFS similar to OMAP4,
    it can definitely benefit by reusing the EMIF related macros
    defined in drivers/memory/emif.h.
    In the current OMAP PM framework the PM code resides under
    arch/arm/mach-omap2/. To enable reuse of the register defines move
    the register defines in the emif header file to include/linux so that
    both the EMIF driver and the AM33XX PM code can benefit.
    Signed-off-by: Dave Gerlach <>
    Cc: Santosh Shilimkar <>
    Cc: Benoit Cousson <>
    Cc: Aneesh V <>
  18. am33xx: Add EDMA to am33xx.dtsi

    Russ Dill committed
  19. @sumananna

    ARM: dts: AM33xx: Add mailbox node

    sumananna committed with Russ Dill
    The mailbox DT node data has been added for AM33xx device, with
    information added currently for communicating with WkupM3
    processor. The usr_id value in the DT node reflects the value
    used for MPU like the rest of the SoCs. The driver logic will
    be adjusted to account for the WkupM3 usr_id within the code.
    Signed-off-by: Suman Anna <>
  20. @sumananna

    mailbox/omap: add code to support the wkupm3 operations

    sumananna committed with Russ Dill
    The WkupM3 mailbox used for triggering PM operations such as suspend
    and resume on AM33x/AM43x is special in that the M3 processor cannot
    access the mailbox registers. However, an interrupt is needed to be
    sent to request the M3 to perform a desired PM operation. This patch
    adds the support for this special mailbox through separate ops for
    this mailbox. These ops are designed to have the WkupM3's Rx interrupt
    programmed within the driver, during transmission of a message. The
    message is immediately read back and the internal mailbox interrupt
    acknowledged as well to avoid triggering any spurious interrupts to
    the M3.
    Signed-off-by: Suman Anna <>
  21. @sumananna

    mailbox/omap: remove omap_mbox_type_t from mailbox ops

    sumananna committed with Russ Dill
    The type definition omap_mbox_type_t used for distinguishing
    OMAP1 from OMAP2+ mailboxes does not really belong to the
    ops, and has been cleaned up.
    Signed-off-by: Loic Pallardy <>
    Signed-off-by: Suman Anna <>
  22. @sumananna

    ARM: dts: OMAP5: Add mailbox dt node

    sumananna committed with Russ Dill
    Add the mailbox device DT node for OMAP5 SoC.
    Signed-off-by: Suman Anna <>
  23. @sumananna

    ARM: OMAP5: hwmod data: Add mailbox data

    sumananna committed with Russ Dill
    Add the hwmod data for the mailbox IP in OMAP5 SoC.
    This is needed to be able to enable the OMAP mailbox
    support for OMAP5.
    Signed-off-by: Suman Anna <>
  24. @sumananna

    ARM: dts: OMAP2+: Add mailbox nodes

    sumananna committed with Russ Dill
    The mailbox DT node data has been added for OMAP2420,
    OMAP2430, OMAP3430/OMAP3630, OMAP44xx devices. Data
    for OMAP5 and other SoCs will be added separately.
    The mailbox static device initialization logic is also
    adjusted for a DT boot.
    Signed-off-by: Suman Anna <>
  25. @sumananna

    mailbox/omap: add support for parsing dt devices

    sumananna committed with Russ Dill
    Logic has been added to the OMAP2+ mailbox code to
    parse the mailbox dt nodes and construct the different
    mailboxes associated with the instance. The design is
    based on gathering the same information that was being
    passed previously through the platform data, except for
    the interrupt type configuration information.
    Signed-off-by: Suman Anna <>
  26. @sumananna

    mailbox/omap: add a parent structure common to all mboxes

    sumananna committed with Russ Dill
    A new structure, omap_mbox_device, is added to contain
    the global variables pertinent to a mailbox h/w IP block.
    This enables the support for having multiple instances of
    the same h/w IP block in the SoC. The startup sequence for
    each mailbox is also simplified along the way, removing the
    usage of single global configuration variables for all h/w
    Reviewed-by: Russ Dill <>
    Signed-off-by: Suman Anna <>
Commits on Sep 6, 2013
  1. ARM: OMAP4+: Remove static iotable mappings for SRAM

    Rajendra Nayak committed with Russ Dill
    In order to handle errata I688, a page of sram was reserved by doing a
    static iotable map. Now that we use gen_pool to manage sram, we can
    completely remove all of these static mappings and use gen_pool_alloc()
    to get the one page of sram space needed to implement errata I688.
    Suggested-by: Sekhar Nori <>
    Signed-off-by: Rajendra Nayak <>
  2. ARM: OMAP4+: Move SRAM data to DT

    Rajendra Nayak committed with Russ Dill
    Use drivers/misc/sram.c driver to manage SRAM on all DT only
    OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
    the existing private plat-omap/sram.c
    Address and size related data  is removed from mach-omap2/sram.c
    and now passed to drivers/misc/sram.c from DT.
    Users can hence use general purpose allocator apis instead of
    OMAP private ones to manage and use SRAM.
    Signed-off-by: Rajendra Nayak <rnayak@xxxxxx>
  3. ARM: AM335x: Get rid of unused sram init function

    Rajendra Nayak committed with Russ Dill
    Remove the empty am33xx_sram_init() function.
    Signed-off-by: Rajendra Nayak <>
Commits on Sep 2, 2013
  1. @torvalds

    Linux 3.11

    torvalds committed
  2. @torvalds

    Merge tag 'scsi-fixes' of git://…

    torvalds committed
    Pull SCSI fix from James Bottomley:
     "This is a bug fix for the pm80xx driver.  It turns out that when the
      new hardware support was added in 3.10 the IO command size was kept at
      the old hard coded value.  This means that the driver attaches to some
      new cards and then simply hangs the system"
    * tag 'scsi-fixes' of git://
      [SCSI] pm80xx: fix Adaptec 71605H hang
  3. @torvalds

    Merge branch 'x86-urgent-for-linus' of git://…

    torvalds committed
    Pull x86 boot fix from Peter Anvin:
     "A single very small boot fix for very large memory systems (> 0.5T)"
    * 'x86-urgent-for-linus' of git://
      x86/mm: Fix boot crash with DEBUG_PAGE_ALLOC=y and more than 512G RAM
  4. @torvalds

    Merge branch 'fixes' of git://

    torvalds committed
    Pull slave-dma fix from Vinod Koul:
     "A fix for resolving TI_EDMA driver's build error in allmodconfig to
      have filter function built in""
    * 'fixes' of git://
      dma/Kconfig: TI_EDMA needs to be boolean
Commits on Aug 31, 2013
  1. @torvalds

    Merge git://

    torvalds committed
    Pull networking fixes from David Miller:
     1) There was a simplification in the ipv6 ndisc packet sending
        attempted here, which avoided using memory accounting on the
        per-netns ndisc socket for sending NDISC packets.  It did fix some
        important issues, but it causes regressions so it gets reverted here
        too.  Specifically, the problem with this change is that the IPV6
        output path really depends upon there being a valid skb->sk
        The reason we want to do this change in some form when we figure out
        how to do it right, is that if a device goes down the ndisc_sk
        socket send queue will fill up and block NDISC packets that we want
        to send to other devices too.  That's really bad behavior.
        Hopefully Thomas can come up with a better version of this change.
     2) Fix a severe TCP performance regression by reverting a change made
        to dev_pick_tx() quite some time ago.  From Eric Dumazet.
     3) TIPC returns wrongly signed error codes, fix from Erik Hugne.
     4) Fix OOPS when doing IPSEC over ipv4 tunnels due to orphaning the
        skb->sk too early.  Fix from Li Hongjun.
     5) RAW ipv4 sockets can use the wrong routing key during lookup, from
        Chris Clark.
     6) Similar to #1 revert an older change that tried to use plain
        alloc_skb() for SYN/ACK TCP packets, this broke the netfilter owner
        mark which needs to see the skb->sk for such frames.  From Phil
     7) BNX2x driver bug fixes from Ariel Elior and Yuval Mintz,
        specifically in the handling of virtual functions.
     8) IPSEC path error propagations to sockets is not done properly when
        we have v4 in v6, and v6 in v4 type rules.  Fix from Hannes Frederic
     9) Fix missing channel context release in mac80211, from Johannes Berg.
    10) Fix network namespace handing wrt.  SCM_RIGHTS, from Andy
    11) Fix usage of bogus NAPI weight in jme, netxen, and ps3_gelic
        drivers.  From Michal Schmidt.
    12) Hopefully a complete and correct fix for the genetlink dump locking
        and module reference counting.  From Pravin B Shelar.
    13) sk_busy_loop() must do a cpu_relax(), from Eliezer Tamir.
    14) Fix handling of timestamp offset when restoring a snapshotted TCP
        socket.  From Andrew Vagin.
    * git:// (44 commits)
      net: fec: fix time stamping logic after napi conversion
      net: bridge: convert MLDv2 Query MRC into msecs_to_jiffies for max_delay
      mISDN: return -EINVAL on error in dsp_control_req()
      net: revert 8728c54 ("net: dev_pick_tx() fix")
      Revert "ipv6: Don't depend on per socket memory for neighbour discovery messages"
      ipv4 tunnels: fix an oops when using ipip/sit with IPsec
      tipc: set sk_err correctly when connection fails
      tcp: tcp_make_synack() should use sock_wmalloc
      bridge: separate querier and query timer into IGMP/IPv4 and MLD/IPv6 ones
      ipv6: Don't depend on per socket memory for neighbour discovery messages
      ipv4: sendto/hdrincl: don't use destination address found in header
      tcp: don't apply tsoffset if rcv_tsecr is zero
      tcp: initialize rcv_tstamp for restored sockets
      net: xilinx: fix memleak
      net: usb: Add HP hs2434 device to ZLP exception table
      net: add cpu_relax to busy poll loop
      net: stmmac: fixed the pbl setting with DT
      genl: Hold reference on correct module while netlink-dump.
      genl: Fix genl dumpit() locking.
      xfrm: Fix potential null pointer dereference in xdst_queue_output
  2. @torvalds

    MAINTAINERS: change my DT related maintainer address

    Ian Campbell committed with torvalds
    Filtering capabilities on my work email are pretty much non-existent and this
    has turned out to be something of a firehose...
    Cc: Stephen Warren <>
    Cc: Rob Herring <>
    Cc: Olof Johansson <>
    Cc: Linus Walleij <>
    Signed-off-by: Ian Campbell <>
    Acked-by: Pawel Moll <>
    Acked-by: Mark Rutland <>
    Signed-off-by: Linus Torvalds <>
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