From 628b197f2313ceb6ea7378c9e4d5a486724dcf74 Mon Sep 17 00:00:00 2001
From: Link Mauve <linkmauve@linkmauve.fr>
Date: Thu, 9 Oct 2025 12:15:02 +0200
Subject: [PATCH] WIP: Add fjcvtzs instruction to core::arch::aarch64

This instruction should only be used when the jsconv feature is checked.
---
 .../stdarch-gen-arm/spec/neon/aarch64.spec.yml  | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml b/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
index 34b330e1b8588..c84ce22de4004 100644
--- a/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
+++ b/library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
@@ -14267,3 +14267,20 @@ intrinsics:
                 - 'vluti4q_laneq_{neon_type[5]}_x2::<LANE>'
                 - - FnCall: [transmute, [a]]
                   - b
+
+  - name: "fjcvtzs"
+    doc: "Floating-point JavaScript convert to signed fixed-point, rounding toward zero"
+    arguments: ["a: {type}"]
+    return_type: "i32"
+    attr:
+      - FnCall: [target_feature, ['enable = "jsconv"']]
+      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fjcvtzs]]}]]
+    safety: safe
+    types:
+      - f64
+    compose:
+      - LLVMLink:
+          name: "fjcvtzs"
+          links:
+            - link: "llvm.aarch64.fjcvtzs"
+              arch: aarch64,arm64ec