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// File generated by `rustc_codegen_gcc/tools/generate_intrinsics.py`
// DO NOT EDIT IT!
/// Translate a given LLVM intrinsic name to an equivalent GCC one.
fn map_arch_intrinsic(full_name: &str) -> &'static str {
let Some(name) = full_name.strip_prefix("llvm.") else {
unimplemented!("***** unsupported LLVM intrinsic {}", full_name)
};
let Some((arch, name)) = name.split_once('.') else {
unimplemented!("***** unsupported LLVM intrinsic llvm.{}", name)
};
let old_arch_res = old_archs(arch, name);
if let ArchCheckResult::Ok(res) = old_arch_res {
return res;
}
match arch {
"aarch64" => {
fn aarch64(name: &str, full_name: &str) -> &'static str {
match name {
// aarch64
"chkfeat" => "__builtin_arm_chkfeat",
"dmb" => "__builtin_arm_dmb",
"dsb" => "__builtin_arm_dsb",
"gcspopm" => "__builtin_arm_gcspopm",
"gcsss" => "__builtin_arm_gcsss",
"isb" => "__builtin_arm_isb",
"prefetch" => "__builtin_arm_prefetch",
"range.prefetch" => "__builtin_arm_range_prefetch",
"sme.in.streaming.mode" => "__builtin_arm_in_streaming_mode",
"sve.aesd" => "__builtin_sve_svaesd_u8",
"sve.aese" => "__builtin_sve_svaese_u8",
"sve.aesimc" => "__builtin_sve_svaesimc_u8",
"sve.aesmc" => "__builtin_sve_svaesmc_u8",
"sve.rax1" => "__builtin_sve_svrax1_u64",
"sve.rdffr" => "__builtin_sve_svrdffr",
"sve.rdffr.z" => "__builtin_sve_svrdffr_z",
"sve.setffr" => "__builtin_sve_svsetffr",
"sve.sm4e" => "__builtin_sve_svsm4e_u32",
"sve.sm4ekey" => "__builtin_sve_svsm4ekey_u32",
"sve.wrffr" => "__builtin_sve_svwrffr",
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
aarch64(name, full_name)
}
"amdgcn" => {
fn amdgcn(name: &str, full_name: &str) -> &'static str {
match name {
// amdgcn
"add.max.i32" => "__builtin_amdgcn_add_max_i32",
"add.max.u32" => "__builtin_amdgcn_add_max_u32",
"add.min.i32" => "__builtin_amdgcn_add_min_i32",
"add.min.u32" => "__builtin_amdgcn_add_min_u32",
"alignbyte" => "__builtin_amdgcn_alignbyte",
"ashr.pk.i8.i32" => "__builtin_amdgcn_ashr_pk_i8_i32",
"ashr.pk.u8.i32" => "__builtin_amdgcn_ashr_pk_u8_i32",
"buffer.wbinvl1" => "__builtin_amdgcn_buffer_wbinvl1",
"buffer.wbinvl1.sc" => "__builtin_amdgcn_buffer_wbinvl1_sc",
"buffer.wbinvl1.vol" => "__builtin_amdgcn_buffer_wbinvl1_vol",
"cluster.id.x" => "__builtin_amdgcn_cluster_id_x",
"cluster.id.y" => "__builtin_amdgcn_cluster_id_y",
"cluster.id.z" => "__builtin_amdgcn_cluster_id_z",
"cluster.load.async.to.lds.b128" => {
"__builtin_amdgcn_cluster_load_async_to_lds_b128"
}
"cluster.load.async.to.lds.b32" => {
"__builtin_amdgcn_cluster_load_async_to_lds_b32"
}
"cluster.load.async.to.lds.b64" => {
"__builtin_amdgcn_cluster_load_async_to_lds_b64"
}
"cluster.load.async.to.lds.b8" => {
"__builtin_amdgcn_cluster_load_async_to_lds_b8"
}
"cluster.workgroup.flat.id" => "__builtin_amdgcn_cluster_workgroup_flat_id",
"cluster.workgroup.id.x" => "__builtin_amdgcn_cluster_workgroup_id_x",
"cluster.workgroup.id.y" => "__builtin_amdgcn_cluster_workgroup_id_y",
"cluster.workgroup.id.z" => "__builtin_amdgcn_cluster_workgroup_id_z",
"cluster.workgroup.max.flat.id" => {
"__builtin_amdgcn_cluster_workgroup_max_flat_id"
}
"cluster.workgroup.max.id.x" => "__builtin_amdgcn_cluster_workgroup_max_id_x",
"cluster.workgroup.max.id.y" => "__builtin_amdgcn_cluster_workgroup_max_id_y",
"cluster.workgroup.max.id.z" => "__builtin_amdgcn_cluster_workgroup_max_id_z",
"cubeid" => "__builtin_amdgcn_cubeid",
"cubema" => "__builtin_amdgcn_cubema",
"cubesc" => "__builtin_amdgcn_cubesc",
"cubetc" => "__builtin_amdgcn_cubetc",
"cvt.f16.bf8" => "__builtin_amdgcn_cvt_f16_bf8",
"cvt.f16.fp8" => "__builtin_amdgcn_cvt_f16_fp8",
"cvt.f32.bf8" => "__builtin_amdgcn_cvt_f32_bf8",
"cvt.f32.fp8" => "__builtin_amdgcn_cvt_f32_fp8",
"cvt.f32.fp8.e5m3" => "__builtin_amdgcn_cvt_f32_fp8_e5m3",
"cvt.off.f32.i4" => "__builtin_amdgcn_cvt_off_f32_i4",
"cvt.pk.bf8.f16" => "__builtin_amdgcn_cvt_pk_bf8_f16",
"cvt.pk.bf8.f32" => "__builtin_amdgcn_cvt_pk_bf8_f32",
"cvt.pk.f16.bf8" => "__builtin_amdgcn_cvt_pk_f16_bf8",
"cvt.pk.f16.fp8" => "__builtin_amdgcn_cvt_pk_f16_fp8",
"cvt.pk.f32.bf8" => "__builtin_amdgcn_cvt_pk_f32_bf8",
"cvt.pk.f32.fp8" => "__builtin_amdgcn_cvt_pk_f32_fp8",
"cvt.pk.fp8.f16" => "__builtin_amdgcn_cvt_pk_fp8_f16",
"cvt.pk.fp8.f32" => "__builtin_amdgcn_cvt_pk_fp8_f32",
"cvt.pk.fp8.f32.e5m3" => "__builtin_amdgcn_cvt_pk_fp8_f32_e5m3",
"cvt.pk.i16" => "__builtin_amdgcn_cvt_pk_i16",
"cvt.pk.u16" => "__builtin_amdgcn_cvt_pk_u16",
"cvt.pk.u8.f32" => "__builtin_amdgcn_cvt_pk_u8_f32",
"cvt.pknorm.i16" => "__builtin_amdgcn_cvt_pknorm_i16",
"cvt.pknorm.u16" => "__builtin_amdgcn_cvt_pknorm_u16",
"cvt.pkrtz" => "__builtin_amdgcn_cvt_pkrtz",
"cvt.scale.pk16.bf16.bf6" => "__builtin_amdgcn_cvt_scale_pk16_bf16_bf6",
"cvt.scale.pk16.bf16.fp6" => "__builtin_amdgcn_cvt_scale_pk16_bf16_fp6",
"cvt.scale.pk16.f16.bf6" => "__builtin_amdgcn_cvt_scale_pk16_f16_bf6",
"cvt.scale.pk16.f16.fp6" => "__builtin_amdgcn_cvt_scale_pk16_f16_fp6",
"cvt.scale.pk16.f32.bf6" => "__builtin_amdgcn_cvt_scale_pk16_f32_bf6",
"cvt.scale.pk16.f32.fp6" => "__builtin_amdgcn_cvt_scale_pk16_f32_fp6",
"cvt.scale.pk8.bf16.bf8" => "__builtin_amdgcn_cvt_scale_pk8_bf16_bf8",
"cvt.scale.pk8.bf16.fp4" => "__builtin_amdgcn_cvt_scale_pk8_bf16_fp4",
"cvt.scale.pk8.bf16.fp8" => "__builtin_amdgcn_cvt_scale_pk8_bf16_fp8",
"cvt.scale.pk8.f16.bf8" => "__builtin_amdgcn_cvt_scale_pk8_f16_bf8",
"cvt.scale.pk8.f16.fp4" => "__builtin_amdgcn_cvt_scale_pk8_f16_fp4",
"cvt.scale.pk8.f16.fp8" => "__builtin_amdgcn_cvt_scale_pk8_f16_fp8",
"cvt.scale.pk8.f32.bf8" => "__builtin_amdgcn_cvt_scale_pk8_f32_bf8",
"cvt.scale.pk8.f32.fp4" => "__builtin_amdgcn_cvt_scale_pk8_f32_fp4",
"cvt.scale.pk8.f32.fp8" => "__builtin_amdgcn_cvt_scale_pk8_f32_fp8",
"cvt.scalef32.2xpk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_bf6_f32",
"cvt.scalef32.2xpk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_2xpk16_fp6_f32",
"cvt.scalef32.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_f16_bf8",
"cvt.scalef32.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_f16_fp8",
"cvt.scalef32.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_f32_bf8",
"cvt.scalef32.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_f32_fp8",
"cvt.scalef32.pk.bf16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_bf8",
"cvt.scalef32.pk.bf16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp4",
"cvt.scalef32.pk.bf16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_bf16_fp8",
"cvt.scalef32.pk.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_bf16",
"cvt.scalef32.pk.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f16",
"cvt.scalef32.pk.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_bf8_f32",
"cvt.scalef32.pk.f16.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_bf8",
"cvt.scalef32.pk.f16.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp4",
"cvt.scalef32.pk.f16.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f16_fp8",
"cvt.scalef32.pk.f32.bf8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_bf8",
"cvt.scalef32.pk.f32.fp4" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp4",
"cvt.scalef32.pk.f32.fp8" => "__builtin_amdgcn_cvt_scalef32_pk_f32_fp8",
"cvt.scalef32.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_bf16",
"cvt.scalef32.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f16",
"cvt.scalef32.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp4_f32",
"cvt.scalef32.pk.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_bf16",
"cvt.scalef32.pk.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f16",
"cvt.scalef32.pk.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk_fp8_f32",
"cvt.scalef32.pk16.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk16_bf6_bf16",
"cvt.scalef32.pk16.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk16_bf6_f16",
"cvt.scalef32.pk16.bf6.f32" => "__builtin_amdgcn_cvt_scalef32_pk16_bf6_f32",
"cvt.scalef32.pk16.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk16_fp6_bf16",
"cvt.scalef32.pk16.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk16_fp6_f16",
"cvt.scalef32.pk16.fp6.f32" => "__builtin_amdgcn_cvt_scalef32_pk16_fp6_f32",
"cvt.scalef32.pk32.bf16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_bf6",
"cvt.scalef32.pk32.bf16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_bf16_fp6",
"cvt.scalef32.pk32.bf6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_bf16",
"cvt.scalef32.pk32.bf6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_bf6_f16",
"cvt.scalef32.pk32.f16.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_bf6",
"cvt.scalef32.pk32.f16.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f16_fp6",
"cvt.scalef32.pk32.f32.bf6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_bf6",
"cvt.scalef32.pk32.f32.fp6" => "__builtin_amdgcn_cvt_scalef32_pk32_f32_fp6",
"cvt.scalef32.pk32.fp6.bf16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_bf16",
"cvt.scalef32.pk32.fp6.f16" => "__builtin_amdgcn_cvt_scalef32_pk32_fp6_f16",
"cvt.scalef32.pk8.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk8_bf8_bf16",
"cvt.scalef32.pk8.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_pk8_bf8_f16",
"cvt.scalef32.pk8.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_pk8_bf8_f32",
"cvt.scalef32.pk8.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_pk8_fp4_bf16",
"cvt.scalef32.pk8.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_pk8_fp4_f16",
"cvt.scalef32.pk8.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_pk8_fp4_f32",
"cvt.scalef32.pk8.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_pk8_fp8_bf16",
"cvt.scalef32.pk8.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_pk8_fp8_f16",
"cvt.scalef32.pk8.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_pk8_fp8_f32",
"cvt.scalef32.sr.bf8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_bf16",
"cvt.scalef32.sr.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f16",
"cvt.scalef32.sr.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_bf8_f32",
"cvt.scalef32.sr.fp8.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_bf16",
"cvt.scalef32.sr.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f16",
"cvt.scalef32.sr.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_fp8_f32",
"cvt.scalef32.sr.pk.fp4.bf16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_bf16",
"cvt.scalef32.sr.pk.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f16",
"cvt.scalef32.sr.pk.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk_fp4_f32",
"cvt.scalef32.sr.pk16.bf6.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk16_bf6_bf16"
}
"cvt.scalef32.sr.pk16.bf6.f16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk16_bf6_f16"
}
"cvt.scalef32.sr.pk16.bf6.f32" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk16_bf6_f32"
}
"cvt.scalef32.sr.pk16.fp6.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk16_fp6_bf16"
}
"cvt.scalef32.sr.pk16.fp6.f16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk16_fp6_f16"
}
"cvt.scalef32.sr.pk16.fp6.f32" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk16_fp6_f32"
}
"cvt.scalef32.sr.pk32.bf6.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_bf16"
}
"cvt.scalef32.sr.pk32.bf6.f16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f16"
}
"cvt.scalef32.sr.pk32.bf6.f32" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk32_bf6_f32"
}
"cvt.scalef32.sr.pk32.fp6.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_bf16"
}
"cvt.scalef32.sr.pk32.fp6.f16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f16"
}
"cvt.scalef32.sr.pk32.fp6.f32" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk32_fp6_f32"
}
"cvt.scalef32.sr.pk8.bf8.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk8_bf8_bf16"
}
"cvt.scalef32.sr.pk8.bf8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk8_bf8_f16",
"cvt.scalef32.sr.pk8.bf8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk8_bf8_f32",
"cvt.scalef32.sr.pk8.fp4.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk8_fp4_bf16"
}
"cvt.scalef32.sr.pk8.fp4.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk8_fp4_f16",
"cvt.scalef32.sr.pk8.fp4.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk8_fp4_f32",
"cvt.scalef32.sr.pk8.fp8.bf16" => {
"__builtin_amdgcn_cvt_scalef32_sr_pk8_fp8_bf16"
}
"cvt.scalef32.sr.pk8.fp8.f16" => "__builtin_amdgcn_cvt_scalef32_sr_pk8_fp8_f16",
"cvt.scalef32.sr.pk8.fp8.f32" => "__builtin_amdgcn_cvt_scalef32_sr_pk8_fp8_f32",
"cvt.sr.bf16.f32" => "__builtin_amdgcn_cvt_sr_bf16_f32",
"cvt.sr.bf8.f16" => "__builtin_amdgcn_cvt_sr_bf8_f16",
"cvt.sr.bf8.f32" => "__builtin_amdgcn_cvt_sr_bf8_f32",
"cvt.sr.f16.f32" => "__builtin_amdgcn_cvt_sr_f16_f32",
"cvt.sr.fp8.f16" => "__builtin_amdgcn_cvt_sr_fp8_f16",
"cvt.sr.fp8.f32" => "__builtin_amdgcn_cvt_sr_fp8_f32",
"cvt.sr.fp8.f32.e5m3" => "__builtin_amdgcn_cvt_sr_fp8_f32_e5m3",
"cvt.sr.pk.bf16.f32" => "__builtin_amdgcn_cvt_sr_pk_bf16_f32",
"cvt.sr.pk.f16.f32" => "__builtin_amdgcn_cvt_sr_pk_f16_f32",
"dispatch.id" => "__builtin_amdgcn_dispatch_id",
"dot4.f32.bf8.bf8" => "__builtin_amdgcn_dot4_f32_bf8_bf8",
"dot4.f32.bf8.fp8" => "__builtin_amdgcn_dot4_f32_bf8_fp8",
"dot4.f32.fp8.bf8" => "__builtin_amdgcn_dot4_f32_fp8_bf8",
"dot4.f32.fp8.fp8" => "__builtin_amdgcn_dot4_f32_fp8_fp8",
"ds.add.gs.reg.rtn" => "__builtin_amdgcn_ds_add_gs_reg_rtn",
"ds.atomic.async.barrier.arrive.b64" => {
"__builtin_amdgcn_ds_atomic_async_barrier_arrive_b64"
}
"ds.atomic.barrier.arrive.rtn.b64" => {
"__builtin_amdgcn_ds_atomic_barrier_arrive_rtn_b64"
}
"ds.bpermute" => "__builtin_amdgcn_ds_bpermute",
"ds.bpermute.fi.b32" => "__builtin_amdgcn_ds_bpermute_fi_b32",
"ds.gws.barrier" => "__builtin_amdgcn_ds_gws_barrier",
"ds.gws.init" => "__builtin_amdgcn_ds_gws_init",
"ds.gws.sema.br" => "__builtin_amdgcn_ds_gws_sema_br",
"ds.gws.sema.p" => "__builtin_amdgcn_ds_gws_sema_p",
"ds.gws.sema.release.all" => "__builtin_amdgcn_ds_gws_sema_release_all",
"ds.gws.sema.v" => "__builtin_amdgcn_ds_gws_sema_v",
"ds.permute" => "__builtin_amdgcn_ds_permute",
"ds.sub.gs.reg.rtn" => "__builtin_amdgcn_ds_sub_gs_reg_rtn",
"ds.swizzle" => "__builtin_amdgcn_ds_swizzle",
"endpgm" => "__builtin_amdgcn_endpgm",
"fdot2" => "__builtin_amdgcn_fdot2",
"fdot2.bf16.bf16" => "__builtin_amdgcn_fdot2_bf16_bf16",
"fdot2.f16.f16" => "__builtin_amdgcn_fdot2_f16_f16",
"fdot2.f32.bf16" => "__builtin_amdgcn_fdot2_f32_bf16",
"fdot2c.f32.bf16" => "__builtin_amdgcn_fdot2c_f32_bf16",
"flat.prefetch" => "__builtin_amdgcn_flat_prefetch",
"fmul.legacy" => "__builtin_amdgcn_fmul_legacy",
"global.load.async.to.lds.b128" => {
"__builtin_amdgcn_global_load_async_to_lds_b128"
}
"global.load.async.to.lds.b32" => {
"__builtin_amdgcn_global_load_async_to_lds_b32"
}
"global.load.async.to.lds.b64" => {
"__builtin_amdgcn_global_load_async_to_lds_b64"
}
"global.load.async.to.lds.b8" => "__builtin_amdgcn_global_load_async_to_lds_b8",
"global.load.lds" => "__builtin_amdgcn_global_load_lds",
"global.prefetch" => "__builtin_amdgcn_global_prefetch",
"global.store.async.from.lds.b128" => {
"__builtin_amdgcn_global_store_async_from_lds_b128"
}
"global.store.async.from.lds.b32" => {
"__builtin_amdgcn_global_store_async_from_lds_b32"
}
"global.store.async.from.lds.b64" => {
"__builtin_amdgcn_global_store_async_from_lds_b64"
}
"global.store.async.from.lds.b8" => {
"__builtin_amdgcn_global_store_async_from_lds_b8"
}
"groupstaticsize" => "__builtin_amdgcn_groupstaticsize",
"iglp.opt" => "__builtin_amdgcn_iglp_opt",
"implicit.buffer.ptr" => "__builtin_amdgcn_implicit_buffer_ptr",
"implicitarg.ptr" => "__builtin_amdgcn_implicitarg_ptr",
"interp.mov" => "__builtin_amdgcn_interp_mov",
"interp.p1" => "__builtin_amdgcn_interp_p1",
"interp.p1.f16" => "__builtin_amdgcn_interp_p1_f16",
"interp.p2" => "__builtin_amdgcn_interp_p2",
"interp.p2.f16" => "__builtin_amdgcn_interp_p2_f16",
"is.private" => "__builtin_amdgcn_is_private",
"is.shared" => "__builtin_amdgcn_is_shared",
"kernarg.segment.ptr" => "__builtin_amdgcn_kernarg_segment_ptr",
"lerp" => "__builtin_amdgcn_lerp",
"mbcnt.hi" => "__builtin_amdgcn_mbcnt_hi",
"mbcnt.lo" => "__builtin_amdgcn_mbcnt_lo",
"mfma.f32.16x16x16bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x16bf16_1k",
"mfma.f32.16x16x16f16" => "__builtin_amdgcn_mfma_f32_16x16x16f16",
"mfma.f32.16x16x1f32" => "__builtin_amdgcn_mfma_f32_16x16x1f32",
"mfma.f32.16x16x2bf16" => "__builtin_amdgcn_mfma_f32_16x16x2bf16",
"mfma.f32.16x16x32.bf16" => "__builtin_amdgcn_mfma_f32_16x16x32_bf16",
"mfma.f32.16x16x32.bf8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_bf8",
"mfma.f32.16x16x32.bf8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_bf8_fp8",
"mfma.f32.16x16x32.f16" => "__builtin_amdgcn_mfma_f32_16x16x32_f16",
"mfma.f32.16x16x32.fp8.bf8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_bf8",
"mfma.f32.16x16x32.fp8.fp8" => "__builtin_amdgcn_mfma_f32_16x16x32_fp8_fp8",
"mfma.f32.16x16x4bf16.1k" => "__builtin_amdgcn_mfma_f32_16x16x4bf16_1k",
"mfma.f32.16x16x4f16" => "__builtin_amdgcn_mfma_f32_16x16x4f16",
"mfma.f32.16x16x4f32" => "__builtin_amdgcn_mfma_f32_16x16x4f32",
"mfma.f32.16x16x8.xf32" => "__builtin_amdgcn_mfma_f32_16x16x8_xf32",
"mfma.f32.16x16x8bf16" => "__builtin_amdgcn_mfma_f32_16x16x8bf16",
"mfma.f32.32x32x16.bf16" => "__builtin_amdgcn_mfma_f32_32x32x16_bf16",
"mfma.f32.32x32x16.bf8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_bf8",
"mfma.f32.32x32x16.bf8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_bf8_fp8",
"mfma.f32.32x32x16.f16" => "__builtin_amdgcn_mfma_f32_32x32x16_f16",
"mfma.f32.32x32x16.fp8.bf8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_bf8",
"mfma.f32.32x32x16.fp8.fp8" => "__builtin_amdgcn_mfma_f32_32x32x16_fp8_fp8",
"mfma.f32.32x32x1f32" => "__builtin_amdgcn_mfma_f32_32x32x1f32",
"mfma.f32.32x32x2bf16" => "__builtin_amdgcn_mfma_f32_32x32x2bf16",
"mfma.f32.32x32x2f32" => "__builtin_amdgcn_mfma_f32_32x32x2f32",
"mfma.f32.32x32x4.xf32" => "__builtin_amdgcn_mfma_f32_32x32x4_xf32",
"mfma.f32.32x32x4bf16" => "__builtin_amdgcn_mfma_f32_32x32x4bf16",
"mfma.f32.32x32x4bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x4bf16_1k",
"mfma.f32.32x32x4f16" => "__builtin_amdgcn_mfma_f32_32x32x4f16",
"mfma.f32.32x32x8bf16.1k" => "__builtin_amdgcn_mfma_f32_32x32x8bf16_1k",
"mfma.f32.32x32x8f16" => "__builtin_amdgcn_mfma_f32_32x32x8f16",
"mfma.f32.4x4x1f32" => "__builtin_amdgcn_mfma_f32_4x4x1f32",
"mfma.f32.4x4x2bf16" => "__builtin_amdgcn_mfma_f32_4x4x2bf16",
"mfma.f32.4x4x4bf16.1k" => "__builtin_amdgcn_mfma_f32_4x4x4bf16_1k",
"mfma.f32.4x4x4f16" => "__builtin_amdgcn_mfma_f32_4x4x4f16",
"mfma.f64.16x16x4f64" => "__builtin_amdgcn_mfma_f64_16x16x4f64",
"mfma.f64.4x4x4f64" => "__builtin_amdgcn_mfma_f64_4x4x4f64",
"mfma.i32.16x16x16i8" => "__builtin_amdgcn_mfma_i32_16x16x16i8",
"mfma.i32.16x16x32.i8" => "__builtin_amdgcn_mfma_i32_16x16x32_i8",
"mfma.i32.16x16x4i8" => "__builtin_amdgcn_mfma_i32_16x16x4i8",
"mfma.i32.16x16x64.i8" => "__builtin_amdgcn_mfma_i32_16x16x64_i8",
"mfma.i32.32x32x16.i8" => "__builtin_amdgcn_mfma_i32_32x32x16_i8",
"mfma.i32.32x32x32.i8" => "__builtin_amdgcn_mfma_i32_32x32x32_i8",
"mfma.i32.32x32x4i8" => "__builtin_amdgcn_mfma_i32_32x32x4i8",
"mfma.i32.32x32x8i8" => "__builtin_amdgcn_mfma_i32_32x32x8i8",
"mfma.i32.4x4x4i8" => "__builtin_amdgcn_mfma_i32_4x4x4i8",
"mqsad.pk.u16.u8" => "__builtin_amdgcn_mqsad_pk_u16_u8",
"mqsad.u32.u8" => "__builtin_amdgcn_mqsad_u32_u8",
"msad.u8" => "__builtin_amdgcn_msad_u8",
"perm" => "__builtin_amdgcn_perm",
"perm.pk16.b4.u4" => "__builtin_amdgcn_perm_pk16_b4_u4",
"perm.pk16.b6.u4" => "__builtin_amdgcn_perm_pk16_b6_u4",
"perm.pk16.b8.u4" => "__builtin_amdgcn_perm_pk16_b8_u4",
"permlane.bcast" => "__builtin_amdgcn_permlane_bcast",
"permlane.down" => "__builtin_amdgcn_permlane_down",
"permlane.idx.gen" => "__builtin_amdgcn_permlane_idx_gen",
"permlane.up" => "__builtin_amdgcn_permlane_up",
"permlane.xor" => "__builtin_amdgcn_permlane_xor",
"permlane16.var" => "__builtin_amdgcn_permlane16_var",
"permlanex16.var" => "__builtin_amdgcn_permlanex16_var",
"pk.add.max.i16" => "__builtin_amdgcn_pk_add_max_i16",
"pk.add.max.u16" => "__builtin_amdgcn_pk_add_max_u16",
"pk.add.min.i16" => "__builtin_amdgcn_pk_add_min_i16",
"pk.add.min.u16" => "__builtin_amdgcn_pk_add_min_u16",
"prng.b32" => "__builtin_amdgcn_prng_b32",
"qsad.pk.u16.u8" => "__builtin_amdgcn_qsad_pk_u16_u8",
"queue.ptr" => "__builtin_amdgcn_queue_ptr",
"raw.ptr.buffer.load.lds" => "__builtin_amdgcn_raw_ptr_buffer_load_lds",
"rcp.legacy" => "__builtin_amdgcn_rcp_legacy",
"rsq.legacy" => "__builtin_amdgcn_rsq_legacy",
"s.barrier" => "__builtin_amdgcn_s_barrier",
"s.barrier.init" => "__builtin_amdgcn_s_barrier_init",
"s.barrier.join" => "__builtin_amdgcn_s_barrier_join",
"s.barrier.leave" => "__builtin_amdgcn_s_barrier_leave",
"s.barrier.signal" => "__builtin_amdgcn_s_barrier_signal",
"s.barrier.signal.isfirst" => "__builtin_amdgcn_s_barrier_signal_isfirst",
"s.barrier.signal.var" => "__builtin_amdgcn_s_barrier_signal_var",
"s.barrier.wait" => "__builtin_amdgcn_s_barrier_wait",
"s.buffer.prefetch.data" => "__builtin_amdgcn_s_buffer_prefetch_data",
"s.cluster.barrier" => "__builtin_amdgcn_s_cluster_barrier",
"s.dcache.inv" => "__builtin_amdgcn_s_dcache_inv",
"s.dcache.inv.vol" => "__builtin_amdgcn_s_dcache_inv_vol",
"s.dcache.wb" => "__builtin_amdgcn_s_dcache_wb",
"s.dcache.wb.vol" => "__builtin_amdgcn_s_dcache_wb_vol",
"s.decperflevel" => "__builtin_amdgcn_s_decperflevel",
"s.get.barrier.state" => "__builtin_amdgcn_s_get_barrier_state",
"s.get.named.barrier.state" => "__builtin_amdgcn_s_get_named_barrier_state",
"s.get.waveid.in.workgroup" => "__builtin_amdgcn_s_get_waveid_in_workgroup",
"s.getpc" => "__builtin_amdgcn_s_getpc",
"s.getreg" => "__builtin_amdgcn_s_getreg",
"s.incperflevel" => "__builtin_amdgcn_s_incperflevel",
"s.memrealtime" => "__builtin_amdgcn_s_memrealtime",
"s.memtime" => "__builtin_amdgcn_s_memtime",
"s.monitor.sleep" => "__builtin_amdgcn_s_monitor_sleep",
"s.sendmsg" => "__builtin_amdgcn_s_sendmsg",
"s.sendmsghalt" => "__builtin_amdgcn_s_sendmsghalt",
"s.setprio" => "__builtin_amdgcn_s_setprio",
"s.setprio.inc.wg" => "__builtin_amdgcn_s_setprio_inc_wg",
"s.setreg" => "__builtin_amdgcn_s_setreg",
"s.sleep" => "__builtin_amdgcn_s_sleep",
"s.sleep.var" => "__builtin_amdgcn_s_sleep_var",
"s.ttracedata" => "__builtin_amdgcn_s_ttracedata",
"s.ttracedata.imm" => "__builtin_amdgcn_s_ttracedata_imm",
"s.wait.asynccnt" => "__builtin_amdgcn_s_wait_asynccnt",
"s.wait.event.export.ready" => "__builtin_amdgcn_s_wait_event_export_ready",
"s.wait.tensorcnt" => "__builtin_amdgcn_s_wait_tensorcnt",
"s.waitcnt" => "__builtin_amdgcn_s_waitcnt",
"s.wakeup.barrier" => "__builtin_amdgcn_s_wakeup_barrier",
"sad.hi.u8" => "__builtin_amdgcn_sad_hi_u8",
"sad.u16" => "__builtin_amdgcn_sad_u16",
"sad.u8" => "__builtin_amdgcn_sad_u8",
"sat.pk4.i4.i8" => "__builtin_amdgcn_sat_pk4_i4_i8",
"sat.pk4.u4.u8" => "__builtin_amdgcn_sat_pk4_u4_u8",
"sched.barrier" => "__builtin_amdgcn_sched_barrier",
"sched.group.barrier" => "__builtin_amdgcn_sched_group_barrier",
"sdot2" => "__builtin_amdgcn_sdot2",
"sdot4" => "__builtin_amdgcn_sdot4",
"sdot8" => "__builtin_amdgcn_sdot8",
"smfmac.f32.16x16x128.bf8.bf8" => {
"__builtin_amdgcn_smfmac_f32_16x16x128_bf8_bf8"
}
"smfmac.f32.16x16x128.bf8.fp8" => {
"__builtin_amdgcn_smfmac_f32_16x16x128_bf8_fp8"
}
"smfmac.f32.16x16x128.fp8.bf8" => {
"__builtin_amdgcn_smfmac_f32_16x16x128_fp8_bf8"
}
"smfmac.f32.16x16x128.fp8.fp8" => {
"__builtin_amdgcn_smfmac_f32_16x16x128_fp8_fp8"
}
"smfmac.f32.16x16x32.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x32_bf16",
"smfmac.f32.16x16x32.f16" => "__builtin_amdgcn_smfmac_f32_16x16x32_f16",
"smfmac.f32.16x16x64.bf16" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf16",
"smfmac.f32.16x16x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_bf8",
"smfmac.f32.16x16x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_bf8_fp8",
"smfmac.f32.16x16x64.f16" => "__builtin_amdgcn_smfmac_f32_16x16x64_f16",
"smfmac.f32.16x16x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_bf8",
"smfmac.f32.16x16x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_16x16x64_fp8_fp8",
"smfmac.f32.32x32x16.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x16_bf16",
"smfmac.f32.32x32x16.f16" => "__builtin_amdgcn_smfmac_f32_32x32x16_f16",
"smfmac.f32.32x32x32.bf16" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf16",
"smfmac.f32.32x32x32.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_bf8",
"smfmac.f32.32x32x32.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_bf8_fp8",
"smfmac.f32.32x32x32.f16" => "__builtin_amdgcn_smfmac_f32_32x32x32_f16",
"smfmac.f32.32x32x32.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_bf8",
"smfmac.f32.32x32x32.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x32_fp8_fp8",
"smfmac.f32.32x32x64.bf8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_bf8",
"smfmac.f32.32x32x64.bf8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_bf8_fp8",
"smfmac.f32.32x32x64.fp8.bf8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_bf8",
"smfmac.f32.32x32x64.fp8.fp8" => "__builtin_amdgcn_smfmac_f32_32x32x64_fp8_fp8",
"smfmac.i32.16x16x128.i8" => "__builtin_amdgcn_smfmac_i32_16x16x128_i8",
"smfmac.i32.16x16x64.i8" => "__builtin_amdgcn_smfmac_i32_16x16x64_i8",
"smfmac.i32.32x32x32.i8" => "__builtin_amdgcn_smfmac_i32_32x32x32_i8",
"smfmac.i32.32x32x64.i8" => "__builtin_amdgcn_smfmac_i32_32x32x64_i8",
"struct.ptr.buffer.load.lds" => "__builtin_amdgcn_struct_ptr_buffer_load_lds",
"sudot4" => "__builtin_amdgcn_sudot4",
"sudot8" => "__builtin_amdgcn_sudot8",
"tensor.load.to.lds" => "__builtin_amdgcn_tensor_load_to_lds",
"tensor.load.to.lds.d2" => "__builtin_amdgcn_tensor_load_to_lds_d2",
"tensor.store.from.lds" => "__builtin_amdgcn_tensor_store_from_lds",
"tensor.store.from.lds.d2" => "__builtin_amdgcn_tensor_store_from_lds_d2",
"udot2" => "__builtin_amdgcn_udot2",
"udot4" => "__builtin_amdgcn_udot4",
"udot8" => "__builtin_amdgcn_udot8",
"wave.barrier" => "__builtin_amdgcn_wave_barrier",
"wavefrontsize" => "__builtin_amdgcn_wavefrontsize",
"workgroup.id.x" => "__builtin_amdgcn_workgroup_id_x",
"workgroup.id.y" => "__builtin_amdgcn_workgroup_id_y",
"workgroup.id.z" => "__builtin_amdgcn_workgroup_id_z",
"workitem.id.x" => "__builtin_amdgcn_workitem_id_x",
"workitem.id.y" => "__builtin_amdgcn_workitem_id_y",
"workitem.id.z" => "__builtin_amdgcn_workitem_id_z",
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
amdgcn(name, full_name)
}
"arm" => {
fn arm(name: &str, full_name: &str) -> &'static str {
match name {
// arm
"cdp" => "__builtin_arm_cdp",
"cdp2" => "__builtin_arm_cdp2",
"cmse.tt" => "__builtin_arm_cmse_TT",
"cmse.tta" => "__builtin_arm_cmse_TTA",
"cmse.ttat" => "__builtin_arm_cmse_TTAT",
"cmse.ttt" => "__builtin_arm_cmse_TTT",
"dmb" => "__builtin_arm_dmb",
"dsb" => "__builtin_arm_dsb",
"get.fpscr" => "__builtin_arm_get_fpscr",
"isb" => "__builtin_arm_isb",
"ldc" => "__builtin_arm_ldc",
"ldc2" => "__builtin_arm_ldc2",
"ldc2l" => "__builtin_arm_ldc2l",
"ldcl" => "__builtin_arm_ldcl",
"mcr" => "__builtin_arm_mcr",
"mcr2" => "__builtin_arm_mcr2",
"mrc" => "__builtin_arm_mrc",
"mrc2" => "__builtin_arm_mrc2",
"qadd" => "__builtin_arm_qadd",
"qadd16" => "__builtin_arm_qadd16",
"qadd8" => "__builtin_arm_qadd8",
"qasx" => "__builtin_arm_qasx",
"qsax" => "__builtin_arm_qsax",
"qsub" => "__builtin_arm_qsub",
"qsub16" => "__builtin_arm_qsub16",
"qsub8" => "__builtin_arm_qsub8",
"sadd16" => "__builtin_arm_sadd16",
"sadd8" => "__builtin_arm_sadd8",
"sasx" => "__builtin_arm_sasx",
"sel" => "__builtin_arm_sel",
"set.fpscr" => "__builtin_arm_set_fpscr",
"shadd16" => "__builtin_arm_shadd16",
"shadd8" => "__builtin_arm_shadd8",
"shasx" => "__builtin_arm_shasx",
"shsax" => "__builtin_arm_shsax",
"shsub16" => "__builtin_arm_shsub16",
"shsub8" => "__builtin_arm_shsub8",
"smlabb" => "__builtin_arm_smlabb",
"smlabt" => "__builtin_arm_smlabt",
"smlad" => "__builtin_arm_smlad",
"smladx" => "__builtin_arm_smladx",
"smlald" => "__builtin_arm_smlald",
"smlaldx" => "__builtin_arm_smlaldx",
"smlatb" => "__builtin_arm_smlatb",
"smlatt" => "__builtin_arm_smlatt",
"smlawb" => "__builtin_arm_smlawb",
"smlawt" => "__builtin_arm_smlawt",
"smlsd" => "__builtin_arm_smlsd",
"smlsdx" => "__builtin_arm_smlsdx",
"smlsld" => "__builtin_arm_smlsld",
"smlsldx" => "__builtin_arm_smlsldx",
"smuad" => "__builtin_arm_smuad",
"smuadx" => "__builtin_arm_smuadx",
"smulbb" => "__builtin_arm_smulbb",
"smulbt" => "__builtin_arm_smulbt",
"smultb" => "__builtin_arm_smultb",
"smultt" => "__builtin_arm_smultt",
"smulwb" => "__builtin_arm_smulwb",
"smulwt" => "__builtin_arm_smulwt",
"smusd" => "__builtin_arm_smusd",
"smusdx" => "__builtin_arm_smusdx",
"ssat" => "__builtin_arm_ssat",
"ssat16" => "__builtin_arm_ssat16",
"ssax" => "__builtin_arm_ssax",
"ssub16" => "__builtin_arm_ssub16",
"ssub8" => "__builtin_arm_ssub8",
"stc" => "__builtin_arm_stc",
"stc2" => "__builtin_arm_stc2",
"stc2l" => "__builtin_arm_stc2l",
"stcl" => "__builtin_arm_stcl",
"sxtab16" => "__builtin_arm_sxtab16",
"sxtb16" => "__builtin_arm_sxtb16",
"uadd16" => "__builtin_arm_uadd16",
"uadd8" => "__builtin_arm_uadd8",
"uasx" => "__builtin_arm_uasx",
"uhadd16" => "__builtin_arm_uhadd16",
"uhadd8" => "__builtin_arm_uhadd8",
"uhasx" => "__builtin_arm_uhasx",
"uhsax" => "__builtin_arm_uhsax",
"uhsub16" => "__builtin_arm_uhsub16",
"uhsub8" => "__builtin_arm_uhsub8",
"uqadd16" => "__builtin_arm_uqadd16",
"uqadd8" => "__builtin_arm_uqadd8",
"uqasx" => "__builtin_arm_uqasx",
"uqsax" => "__builtin_arm_uqsax",
"uqsub16" => "__builtin_arm_uqsub16",
"uqsub8" => "__builtin_arm_uqsub8",
"usad8" => "__builtin_arm_usad8",
"usada8" => "__builtin_arm_usada8",
"usat" => "__builtin_arm_usat",
"usat16" => "__builtin_arm_usat16",
"usax" => "__builtin_arm_usax",
"usub16" => "__builtin_arm_usub16",
"usub8" => "__builtin_arm_usub8",
"uxtab16" => "__builtin_arm_uxtab16",
"uxtb16" => "__builtin_arm_uxtb16",
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
arm(name, full_name)
}
"bpf" => {
fn bpf(name: &str, full_name: &str) -> &'static str {
match name {
// bpf
"btf.type.id" => "__builtin_bpf_btf_type_id",
"compare" => "__builtin_bpf_compare",
"getelementptr.and.load" => "__builtin_bpf_getelementptr_and_load",
"getelementptr.and.store" => "__builtin_bpf_getelementptr_and_store",
"load.byte" => "__builtin_bpf_load_byte",
"load.half" => "__builtin_bpf_load_half",
"load.word" => "__builtin_bpf_load_word",
"passthrough" => "__builtin_bpf_passthrough",
"preserve.enum.value" => "__builtin_bpf_preserve_enum_value",
"preserve.field.info" => "__builtin_bpf_preserve_field_info",
"preserve.type.info" => "__builtin_bpf_preserve_type_info",
"pseudo" => "__builtin_bpf_pseudo",
_ => unimplemented!("***** unsupported LLVM intrinsic {full_name}"),
}
}
bpf(name, full_name)
}
"hexagon" => {
fn hexagon(name: &str, full_name: &str) -> &'static str {
match name {
// hexagon
"A2.abs" => "__builtin_HEXAGON_A2_abs",
"A2.absp" => "__builtin_HEXAGON_A2_absp",
"A2.abssat" => "__builtin_HEXAGON_A2_abssat",
"A2.add" => "__builtin_HEXAGON_A2_add",
"A2.addh.h16.hh" => "__builtin_HEXAGON_A2_addh_h16_hh",
"A2.addh.h16.hl" => "__builtin_HEXAGON_A2_addh_h16_hl",
"A2.addh.h16.lh" => "__builtin_HEXAGON_A2_addh_h16_lh",
"A2.addh.h16.ll" => "__builtin_HEXAGON_A2_addh_h16_ll",
"A2.addh.h16.sat.hh" => "__builtin_HEXAGON_A2_addh_h16_sat_hh",
"A2.addh.h16.sat.hl" => "__builtin_HEXAGON_A2_addh_h16_sat_hl",
"A2.addh.h16.sat.lh" => "__builtin_HEXAGON_A2_addh_h16_sat_lh",
"A2.addh.h16.sat.ll" => "__builtin_HEXAGON_A2_addh_h16_sat_ll",
"A2.addh.l16.hl" => "__builtin_HEXAGON_A2_addh_l16_hl",
"A2.addh.l16.ll" => "__builtin_HEXAGON_A2_addh_l16_ll",
"A2.addh.l16.sat.hl" => "__builtin_HEXAGON_A2_addh_l16_sat_hl",
"A2.addh.l16.sat.ll" => "__builtin_HEXAGON_A2_addh_l16_sat_ll",
"A2.addi" => "__builtin_HEXAGON_A2_addi",
"A2.addp" => "__builtin_HEXAGON_A2_addp",
"A2.addpsat" => "__builtin_HEXAGON_A2_addpsat",
"A2.addsat" => "__builtin_HEXAGON_A2_addsat",
"A2.addsp" => "__builtin_HEXAGON_A2_addsp",
"A2.and" => "__builtin_HEXAGON_A2_and",
"A2.andir" => "__builtin_HEXAGON_A2_andir",
"A2.andp" => "__builtin_HEXAGON_A2_andp",
"A2.aslh" => "__builtin_HEXAGON_A2_aslh",
"A2.asrh" => "__builtin_HEXAGON_A2_asrh",
"A2.combine.hh" => "__builtin_HEXAGON_A2_combine_hh",
"A2.combine.hl" => "__builtin_HEXAGON_A2_combine_hl",
"A2.combine.lh" => "__builtin_HEXAGON_A2_combine_lh",
"A2.combine.ll" => "__builtin_HEXAGON_A2_combine_ll",
"A2.combineii" => "__builtin_HEXAGON_A2_combineii",
"A2.combinew" => "__builtin_HEXAGON_A2_combinew",
"A2.max" => "__builtin_HEXAGON_A2_max",
"A2.maxp" => "__builtin_HEXAGON_A2_maxp",
"A2.maxu" => "__builtin_HEXAGON_A2_maxu",
"A2.maxup" => "__builtin_HEXAGON_A2_maxup",
"A2.min" => "__builtin_HEXAGON_A2_min",
"A2.minp" => "__builtin_HEXAGON_A2_minp",
"A2.minu" => "__builtin_HEXAGON_A2_minu",
"A2.minup" => "__builtin_HEXAGON_A2_minup",
"A2.neg" => "__builtin_HEXAGON_A2_neg",
"A2.negp" => "__builtin_HEXAGON_A2_negp",
"A2.negsat" => "__builtin_HEXAGON_A2_negsat",
"A2.not" => "__builtin_HEXAGON_A2_not",
"A2.notp" => "__builtin_HEXAGON_A2_notp",
"A2.or" => "__builtin_HEXAGON_A2_or",
"A2.orir" => "__builtin_HEXAGON_A2_orir",
"A2.orp" => "__builtin_HEXAGON_A2_orp",
"A2.roundsat" => "__builtin_HEXAGON_A2_roundsat",
"A2.sat" => "__builtin_HEXAGON_A2_sat",
"A2.satb" => "__builtin_HEXAGON_A2_satb",
"A2.sath" => "__builtin_HEXAGON_A2_sath",
"A2.satub" => "__builtin_HEXAGON_A2_satub",
"A2.satuh" => "__builtin_HEXAGON_A2_satuh",
"A2.sub" => "__builtin_HEXAGON_A2_sub",
"A2.subh.h16.hh" => "__builtin_HEXAGON_A2_subh_h16_hh",
"A2.subh.h16.hl" => "__builtin_HEXAGON_A2_subh_h16_hl",
"A2.subh.h16.lh" => "__builtin_HEXAGON_A2_subh_h16_lh",
"A2.subh.h16.ll" => "__builtin_HEXAGON_A2_subh_h16_ll",
"A2.subh.h16.sat.hh" => "__builtin_HEXAGON_A2_subh_h16_sat_hh",
"A2.subh.h16.sat.hl" => "__builtin_HEXAGON_A2_subh_h16_sat_hl",
"A2.subh.h16.sat.lh" => "__builtin_HEXAGON_A2_subh_h16_sat_lh",
"A2.subh.h16.sat.ll" => "__builtin_HEXAGON_A2_subh_h16_sat_ll",
"A2.subh.l16.hl" => "__builtin_HEXAGON_A2_subh_l16_hl",
"A2.subh.l16.ll" => "__builtin_HEXAGON_A2_subh_l16_ll",
"A2.subh.l16.sat.hl" => "__builtin_HEXAGON_A2_subh_l16_sat_hl",
"A2.subh.l16.sat.ll" => "__builtin_HEXAGON_A2_subh_l16_sat_ll",
"A2.subp" => "__builtin_HEXAGON_A2_subp",
"A2.subri" => "__builtin_HEXAGON_A2_subri",
"A2.subsat" => "__builtin_HEXAGON_A2_subsat",
"A2.svaddh" => "__builtin_HEXAGON_A2_svaddh",
"A2.svaddhs" => "__builtin_HEXAGON_A2_svaddhs",
"A2.svadduhs" => "__builtin_HEXAGON_A2_svadduhs",
"A2.svavgh" => "__builtin_HEXAGON_A2_svavgh",
"A2.svavghs" => "__builtin_HEXAGON_A2_svavghs",
"A2.svnavgh" => "__builtin_HEXAGON_A2_svnavgh",
"A2.svsubh" => "__builtin_HEXAGON_A2_svsubh",
"A2.svsubhs" => "__builtin_HEXAGON_A2_svsubhs",
"A2.svsubuhs" => "__builtin_HEXAGON_A2_svsubuhs",
"A2.swiz" => "__builtin_HEXAGON_A2_swiz",
"A2.sxtb" => "__builtin_HEXAGON_A2_sxtb",
"A2.sxth" => "__builtin_HEXAGON_A2_sxth",
"A2.sxtw" => "__builtin_HEXAGON_A2_sxtw",
"A2.tfr" => "__builtin_HEXAGON_A2_tfr",
"A2.tfrih" => "__builtin_HEXAGON_A2_tfrih",
"A2.tfril" => "__builtin_HEXAGON_A2_tfril",
"A2.tfrp" => "__builtin_HEXAGON_A2_tfrp",
"A2.tfrpi" => "__builtin_HEXAGON_A2_tfrpi",
"A2.tfrsi" => "__builtin_HEXAGON_A2_tfrsi",
"A2.vabsh" => "__builtin_HEXAGON_A2_vabsh",
"A2.vabshsat" => "__builtin_HEXAGON_A2_vabshsat",
"A2.vabsw" => "__builtin_HEXAGON_A2_vabsw",
"A2.vabswsat" => "__builtin_HEXAGON_A2_vabswsat",
"A2.vaddb.map" => "__builtin_HEXAGON_A2_vaddb_map",
"A2.vaddh" => "__builtin_HEXAGON_A2_vaddh",
"A2.vaddhs" => "__builtin_HEXAGON_A2_vaddhs",
"A2.vaddub" => "__builtin_HEXAGON_A2_vaddub",
"A2.vaddubs" => "__builtin_HEXAGON_A2_vaddubs",
"A2.vadduhs" => "__builtin_HEXAGON_A2_vadduhs",
"A2.vaddw" => "__builtin_HEXAGON_A2_vaddw",
"A2.vaddws" => "__builtin_HEXAGON_A2_vaddws",
"A2.vavgh" => "__builtin_HEXAGON_A2_vavgh",
"A2.vavghcr" => "__builtin_HEXAGON_A2_vavghcr",
"A2.vavghr" => "__builtin_HEXAGON_A2_vavghr",
"A2.vavgub" => "__builtin_HEXAGON_A2_vavgub",
"A2.vavgubr" => "__builtin_HEXAGON_A2_vavgubr",
"A2.vavguh" => "__builtin_HEXAGON_A2_vavguh",
"A2.vavguhr" => "__builtin_HEXAGON_A2_vavguhr",
"A2.vavguw" => "__builtin_HEXAGON_A2_vavguw",
"A2.vavguwr" => "__builtin_HEXAGON_A2_vavguwr",
"A2.vavgw" => "__builtin_HEXAGON_A2_vavgw",
"A2.vavgwcr" => "__builtin_HEXAGON_A2_vavgwcr",
"A2.vavgwr" => "__builtin_HEXAGON_A2_vavgwr",
"A2.vcmpbeq" => "__builtin_HEXAGON_A2_vcmpbeq",
"A2.vcmpbgtu" => "__builtin_HEXAGON_A2_vcmpbgtu",
"A2.vcmpheq" => "__builtin_HEXAGON_A2_vcmpheq",
"A2.vcmphgt" => "__builtin_HEXAGON_A2_vcmphgt",
"A2.vcmphgtu" => "__builtin_HEXAGON_A2_vcmphgtu",
"A2.vcmpweq" => "__builtin_HEXAGON_A2_vcmpweq",
"A2.vcmpwgt" => "__builtin_HEXAGON_A2_vcmpwgt",
"A2.vcmpwgtu" => "__builtin_HEXAGON_A2_vcmpwgtu",
"A2.vconj" => "__builtin_HEXAGON_A2_vconj",
"A2.vmaxb" => "__builtin_HEXAGON_A2_vmaxb",
"A2.vmaxh" => "__builtin_HEXAGON_A2_vmaxh",
"A2.vmaxub" => "__builtin_HEXAGON_A2_vmaxub",
"A2.vmaxuh" => "__builtin_HEXAGON_A2_vmaxuh",
"A2.vmaxuw" => "__builtin_HEXAGON_A2_vmaxuw",
"A2.vmaxw" => "__builtin_HEXAGON_A2_vmaxw",
"A2.vminb" => "__builtin_HEXAGON_A2_vminb",
"A2.vminh" => "__builtin_HEXAGON_A2_vminh",
"A2.vminub" => "__builtin_HEXAGON_A2_vminub",
"A2.vminuh" => "__builtin_HEXAGON_A2_vminuh",
"A2.vminuw" => "__builtin_HEXAGON_A2_vminuw",
"A2.vminw" => "__builtin_HEXAGON_A2_vminw",
"A2.vnavgh" => "__builtin_HEXAGON_A2_vnavgh",
"A2.vnavghcr" => "__builtin_HEXAGON_A2_vnavghcr",
"A2.vnavghr" => "__builtin_HEXAGON_A2_vnavghr",
"A2.vnavgw" => "__builtin_HEXAGON_A2_vnavgw",
"A2.vnavgwcr" => "__builtin_HEXAGON_A2_vnavgwcr",
"A2.vnavgwr" => "__builtin_HEXAGON_A2_vnavgwr",
"A2.vraddub" => "__builtin_HEXAGON_A2_vraddub",
"A2.vraddub.acc" => "__builtin_HEXAGON_A2_vraddub_acc",
"A2.vrsadub" => "__builtin_HEXAGON_A2_vrsadub",
"A2.vrsadub.acc" => "__builtin_HEXAGON_A2_vrsadub_acc",
"A2.vsubb.map" => "__builtin_HEXAGON_A2_vsubb_map",
"A2.vsubh" => "__builtin_HEXAGON_A2_vsubh",
"A2.vsubhs" => "__builtin_HEXAGON_A2_vsubhs",
"A2.vsubub" => "__builtin_HEXAGON_A2_vsubub",
"A2.vsububs" => "__builtin_HEXAGON_A2_vsububs",
"A2.vsubuhs" => "__builtin_HEXAGON_A2_vsubuhs",
"A2.vsubw" => "__builtin_HEXAGON_A2_vsubw",
"A2.vsubws" => "__builtin_HEXAGON_A2_vsubws",
"A2.xor" => "__builtin_HEXAGON_A2_xor",
"A2.xorp" => "__builtin_HEXAGON_A2_xorp",
"A2.zxtb" => "__builtin_HEXAGON_A2_zxtb",
"A2.zxth" => "__builtin_HEXAGON_A2_zxth",
"A4.andn" => "__builtin_HEXAGON_A4_andn",
"A4.andnp" => "__builtin_HEXAGON_A4_andnp",
"A4.bitsplit" => "__builtin_HEXAGON_A4_bitsplit",
"A4.bitspliti" => "__builtin_HEXAGON_A4_bitspliti",
"A4.boundscheck" => "__builtin_HEXAGON_A4_boundscheck",
"A4.cmpbeq" => "__builtin_HEXAGON_A4_cmpbeq",
"A4.cmpbeqi" => "__builtin_HEXAGON_A4_cmpbeqi",
"A4.cmpbgt" => "__builtin_HEXAGON_A4_cmpbgt",
"A4.cmpbgti" => "__builtin_HEXAGON_A4_cmpbgti",
"A4.cmpbgtu" => "__builtin_HEXAGON_A4_cmpbgtu",
"A4.cmpbgtui" => "__builtin_HEXAGON_A4_cmpbgtui",
"A4.cmpheq" => "__builtin_HEXAGON_A4_cmpheq",
"A4.cmpheqi" => "__builtin_HEXAGON_A4_cmpheqi",
"A4.cmphgt" => "__builtin_HEXAGON_A4_cmphgt",
"A4.cmphgti" => "__builtin_HEXAGON_A4_cmphgti",
"A4.cmphgtu" => "__builtin_HEXAGON_A4_cmphgtu",
"A4.cmphgtui" => "__builtin_HEXAGON_A4_cmphgtui",
"A4.combineir" => "__builtin_HEXAGON_A4_combineir",
"A4.combineri" => "__builtin_HEXAGON_A4_combineri",
"A4.cround.ri" => "__builtin_HEXAGON_A4_cround_ri",
"A4.cround.rr" => "__builtin_HEXAGON_A4_cround_rr",
"A4.modwrapu" => "__builtin_HEXAGON_A4_modwrapu",
"A4.orn" => "__builtin_HEXAGON_A4_orn",
"A4.ornp" => "__builtin_HEXAGON_A4_ornp",
"A4.rcmpeq" => "__builtin_HEXAGON_A4_rcmpeq",
"A4.rcmpeqi" => "__builtin_HEXAGON_A4_rcmpeqi",
"A4.rcmpneq" => "__builtin_HEXAGON_A4_rcmpneq",
"A4.rcmpneqi" => "__builtin_HEXAGON_A4_rcmpneqi",
"A4.round.ri" => "__builtin_HEXAGON_A4_round_ri",
"A4.round.ri.sat" => "__builtin_HEXAGON_A4_round_ri_sat",
"A4.round.rr" => "__builtin_HEXAGON_A4_round_rr",
"A4.round.rr.sat" => "__builtin_HEXAGON_A4_round_rr_sat",
"A4.tlbmatch" => "__builtin_HEXAGON_A4_tlbmatch",
"A4.vcmpbeq.any" => "__builtin_HEXAGON_A4_vcmpbeq_any",
"A4.vcmpbeqi" => "__builtin_HEXAGON_A4_vcmpbeqi",
"A4.vcmpbgt" => "__builtin_HEXAGON_A4_vcmpbgt",
"A4.vcmpbgti" => "__builtin_HEXAGON_A4_vcmpbgti",
"A4.vcmpbgtui" => "__builtin_HEXAGON_A4_vcmpbgtui",
"A4.vcmpheqi" => "__builtin_HEXAGON_A4_vcmpheqi",
"A4.vcmphgti" => "__builtin_HEXAGON_A4_vcmphgti",
"A4.vcmphgtui" => "__builtin_HEXAGON_A4_vcmphgtui",
"A4.vcmpweqi" => "__builtin_HEXAGON_A4_vcmpweqi",
"A4.vcmpwgti" => "__builtin_HEXAGON_A4_vcmpwgti",
"A4.vcmpwgtui" => "__builtin_HEXAGON_A4_vcmpwgtui",
"A4.vrmaxh" => "__builtin_HEXAGON_A4_vrmaxh",
"A4.vrmaxuh" => "__builtin_HEXAGON_A4_vrmaxuh",
"A4.vrmaxuw" => "__builtin_HEXAGON_A4_vrmaxuw",
"A4.vrmaxw" => "__builtin_HEXAGON_A4_vrmaxw",
"A4.vrminh" => "__builtin_HEXAGON_A4_vrminh",
"A4.vrminuh" => "__builtin_HEXAGON_A4_vrminuh",
"A4.vrminuw" => "__builtin_HEXAGON_A4_vrminuw",
"A4.vrminw" => "__builtin_HEXAGON_A4_vrminw",
"A5.vaddhubs" => "__builtin_HEXAGON_A5_vaddhubs",
"A6.vcmpbeq.notany" => "__builtin_HEXAGON_A6_vcmpbeq_notany",
"A7.clip" => "__builtin_HEXAGON_A7_clip",
"A7.croundd.ri" => "__builtin_HEXAGON_A7_croundd_ri",
"A7.croundd.rr" => "__builtin_HEXAGON_A7_croundd_rr",
"A7.vclip" => "__builtin_HEXAGON_A7_vclip",
"C2.all8" => "__builtin_HEXAGON_C2_all8",
"C2.and" => "__builtin_HEXAGON_C2_and",
"C2.andn" => "__builtin_HEXAGON_C2_andn",
"C2.any8" => "__builtin_HEXAGON_C2_any8",
"C2.bitsclr" => "__builtin_HEXAGON_C2_bitsclr",
"C2.bitsclri" => "__builtin_HEXAGON_C2_bitsclri",
"C2.bitsset" => "__builtin_HEXAGON_C2_bitsset",
"C2.cmpeq" => "__builtin_HEXAGON_C2_cmpeq",
"C2.cmpeqi" => "__builtin_HEXAGON_C2_cmpeqi",
"C2.cmpeqp" => "__builtin_HEXAGON_C2_cmpeqp",
"C2.cmpgei" => "__builtin_HEXAGON_C2_cmpgei",
"C2.cmpgeui" => "__builtin_HEXAGON_C2_cmpgeui",
"C2.cmpgt" => "__builtin_HEXAGON_C2_cmpgt",
"C2.cmpgti" => "__builtin_HEXAGON_C2_cmpgti",
"C2.cmpgtp" => "__builtin_HEXAGON_C2_cmpgtp",
"C2.cmpgtu" => "__builtin_HEXAGON_C2_cmpgtu",
"C2.cmpgtui" => "__builtin_HEXAGON_C2_cmpgtui",
"C2.cmpgtup" => "__builtin_HEXAGON_C2_cmpgtup",
"C2.cmplt" => "__builtin_HEXAGON_C2_cmplt",
"C2.cmpltu" => "__builtin_HEXAGON_C2_cmpltu",
"C2.mask" => "__builtin_HEXAGON_C2_mask",
"C2.mux" => "__builtin_HEXAGON_C2_mux",
"C2.muxii" => "__builtin_HEXAGON_C2_muxii",
"C2.muxir" => "__builtin_HEXAGON_C2_muxir",
"C2.muxri" => "__builtin_HEXAGON_C2_muxri",
"C2.not" => "__builtin_HEXAGON_C2_not",
"C2.or" => "__builtin_HEXAGON_C2_or",
"C2.orn" => "__builtin_HEXAGON_C2_orn",
"C2.pxfer.map" => "__builtin_HEXAGON_C2_pxfer_map",
"C2.tfrpr" => "__builtin_HEXAGON_C2_tfrpr",
"C2.tfrrp" => "__builtin_HEXAGON_C2_tfrrp",
"C2.vitpack" => "__builtin_HEXAGON_C2_vitpack",
"C2.vmux" => "__builtin_HEXAGON_C2_vmux",
"C2.xor" => "__builtin_HEXAGON_C2_xor",
"C4.and.and" => "__builtin_HEXAGON_C4_and_and",
"C4.and.andn" => "__builtin_HEXAGON_C4_and_andn",
"C4.and.or" => "__builtin_HEXAGON_C4_and_or",
"C4.and.orn" => "__builtin_HEXAGON_C4_and_orn",
"C4.cmplte" => "__builtin_HEXAGON_C4_cmplte",
"C4.cmpltei" => "__builtin_HEXAGON_C4_cmpltei",
"C4.cmplteu" => "__builtin_HEXAGON_C4_cmplteu",
"C4.cmplteui" => "__builtin_HEXAGON_C4_cmplteui",
"C4.cmpneq" => "__builtin_HEXAGON_C4_cmpneq",
"C4.cmpneqi" => "__builtin_HEXAGON_C4_cmpneqi",
"C4.fastcorner9" => "__builtin_HEXAGON_C4_fastcorner9",
"C4.fastcorner9.not" => "__builtin_HEXAGON_C4_fastcorner9_not",
"C4.nbitsclr" => "__builtin_HEXAGON_C4_nbitsclr",
"C4.nbitsclri" => "__builtin_HEXAGON_C4_nbitsclri",
"C4.nbitsset" => "__builtin_HEXAGON_C4_nbitsset",
"C4.or.and" => "__builtin_HEXAGON_C4_or_and",
"C4.or.andn" => "__builtin_HEXAGON_C4_or_andn",
"C4.or.or" => "__builtin_HEXAGON_C4_or_or",
"C4.or.orn" => "__builtin_HEXAGON_C4_or_orn",
"F2.conv.d2df" => "__builtin_HEXAGON_F2_conv_d2df",
"F2.conv.d2sf" => "__builtin_HEXAGON_F2_conv_d2sf",
"F2.conv.df2d" => "__builtin_HEXAGON_F2_conv_df2d",
"F2.conv.df2d.chop" => "__builtin_HEXAGON_F2_conv_df2d_chop",
"F2.conv.df2sf" => "__builtin_HEXAGON_F2_conv_df2sf",
"F2.conv.df2ud" => "__builtin_HEXAGON_F2_conv_df2ud",
"F2.conv.df2ud.chop" => "__builtin_HEXAGON_F2_conv_df2ud_chop",
"F2.conv.df2uw" => "__builtin_HEXAGON_F2_conv_df2uw",
"F2.conv.df2uw.chop" => "__builtin_HEXAGON_F2_conv_df2uw_chop",
"F2.conv.df2w" => "__builtin_HEXAGON_F2_conv_df2w",
"F2.conv.df2w.chop" => "__builtin_HEXAGON_F2_conv_df2w_chop",
"F2.conv.sf2d" => "__builtin_HEXAGON_F2_conv_sf2d",
"F2.conv.sf2d.chop" => "__builtin_HEXAGON_F2_conv_sf2d_chop",
"F2.conv.sf2df" => "__builtin_HEXAGON_F2_conv_sf2df",
"F2.conv.sf2ud" => "__builtin_HEXAGON_F2_conv_sf2ud",
"F2.conv.sf2ud.chop" => "__builtin_HEXAGON_F2_conv_sf2ud_chop",
"F2.conv.sf2uw" => "__builtin_HEXAGON_F2_conv_sf2uw",
"F2.conv.sf2uw.chop" => "__builtin_HEXAGON_F2_conv_sf2uw_chop",
"F2.conv.sf2w" => "__builtin_HEXAGON_F2_conv_sf2w",
"F2.conv.sf2w.chop" => "__builtin_HEXAGON_F2_conv_sf2w_chop",
"F2.conv.ud2df" => "__builtin_HEXAGON_F2_conv_ud2df",
"F2.conv.ud2sf" => "__builtin_HEXAGON_F2_conv_ud2sf",
"F2.conv.uw2df" => "__builtin_HEXAGON_F2_conv_uw2df",
"F2.conv.uw2sf" => "__builtin_HEXAGON_F2_conv_uw2sf",
"F2.conv.w2df" => "__builtin_HEXAGON_F2_conv_w2df",
"F2.conv.w2sf" => "__builtin_HEXAGON_F2_conv_w2sf",
"F2.dfadd" => "__builtin_HEXAGON_F2_dfadd",
"F2.dfclass" => "__builtin_HEXAGON_F2_dfclass",
"F2.dfcmpeq" => "__builtin_HEXAGON_F2_dfcmpeq",
"F2.dfcmpge" => "__builtin_HEXAGON_F2_dfcmpge",
"F2.dfcmpgt" => "__builtin_HEXAGON_F2_dfcmpgt",
"F2.dfcmpuo" => "__builtin_HEXAGON_F2_dfcmpuo",
"F2.dfimm.n" => "__builtin_HEXAGON_F2_dfimm_n",
"F2.dfimm.p" => "__builtin_HEXAGON_F2_dfimm_p",
"F2.dfmax" => "__builtin_HEXAGON_F2_dfmax",
"F2.dfmin" => "__builtin_HEXAGON_F2_dfmin",
"F2.dfmpyfix" => "__builtin_HEXAGON_F2_dfmpyfix",
"F2.dfmpyhh" => "__builtin_HEXAGON_F2_dfmpyhh",
"F2.dfmpylh" => "__builtin_HEXAGON_F2_dfmpylh",
"F2.dfmpyll" => "__builtin_HEXAGON_F2_dfmpyll",
"F2.dfsub" => "__builtin_HEXAGON_F2_dfsub",
"F2.sfadd" => "__builtin_HEXAGON_F2_sfadd",
"F2.sfclass" => "__builtin_HEXAGON_F2_sfclass",
"F2.sfcmpeq" => "__builtin_HEXAGON_F2_sfcmpeq",
"F2.sfcmpge" => "__builtin_HEXAGON_F2_sfcmpge",
"F2.sfcmpgt" => "__builtin_HEXAGON_F2_sfcmpgt",
"F2.sfcmpuo" => "__builtin_HEXAGON_F2_sfcmpuo",
"F2.sffixupd" => "__builtin_HEXAGON_F2_sffixupd",
"F2.sffixupn" => "__builtin_HEXAGON_F2_sffixupn",
"F2.sffixupr" => "__builtin_HEXAGON_F2_sffixupr",
"F2.sffma" => "__builtin_HEXAGON_F2_sffma",
"F2.sffma.lib" => "__builtin_HEXAGON_F2_sffma_lib",
"F2.sffma.sc" => "__builtin_HEXAGON_F2_sffma_sc",
"F2.sffms" => "__builtin_HEXAGON_F2_sffms",
"F2.sffms.lib" => "__builtin_HEXAGON_F2_sffms_lib",
"F2.sfimm.n" => "__builtin_HEXAGON_F2_sfimm_n",
"F2.sfimm.p" => "__builtin_HEXAGON_F2_sfimm_p",
"F2.sfmax" => "__builtin_HEXAGON_F2_sfmax",
"F2.sfmin" => "__builtin_HEXAGON_F2_sfmin",
"F2.sfmpy" => "__builtin_HEXAGON_F2_sfmpy",
"F2.sfsub" => "__builtin_HEXAGON_F2_sfsub",
"L2.loadw.locked" => "__builtin_HEXAGON_L2_loadw_locked",
"L4.loadd.locked" => "__builtin__HEXAGON_L4_loadd_locked",
"M2.acci" => "__builtin_HEXAGON_M2_acci",
"M2.accii" => "__builtin_HEXAGON_M2_accii",
"M2.cmaci.s0" => "__builtin_HEXAGON_M2_cmaci_s0",
"M2.cmacr.s0" => "__builtin_HEXAGON_M2_cmacr_s0",
"M2.cmacs.s0" => "__builtin_HEXAGON_M2_cmacs_s0",
"M2.cmacs.s1" => "__builtin_HEXAGON_M2_cmacs_s1",
"M2.cmacsc.s0" => "__builtin_HEXAGON_M2_cmacsc_s0",
"M2.cmacsc.s1" => "__builtin_HEXAGON_M2_cmacsc_s1",
"M2.cmpyi.s0" => "__builtin_HEXAGON_M2_cmpyi_s0",
"M2.cmpyr.s0" => "__builtin_HEXAGON_M2_cmpyr_s0",
"M2.cmpyrs.s0" => "__builtin_HEXAGON_M2_cmpyrs_s0",
"M2.cmpyrs.s1" => "__builtin_HEXAGON_M2_cmpyrs_s1",
"M2.cmpyrsc.s0" => "__builtin_HEXAGON_M2_cmpyrsc_s0",
"M2.cmpyrsc.s1" => "__builtin_HEXAGON_M2_cmpyrsc_s1",
"M2.cmpys.s0" => "__builtin_HEXAGON_M2_cmpys_s0",
"M2.cmpys.s1" => "__builtin_HEXAGON_M2_cmpys_s1",
"M2.cmpysc.s0" => "__builtin_HEXAGON_M2_cmpysc_s0",
"M2.cmpysc.s1" => "__builtin_HEXAGON_M2_cmpysc_s1",
"M2.cnacs.s0" => "__builtin_HEXAGON_M2_cnacs_s0",
"M2.cnacs.s1" => "__builtin_HEXAGON_M2_cnacs_s1",
"M2.cnacsc.s0" => "__builtin_HEXAGON_M2_cnacsc_s0",
"M2.cnacsc.s1" => "__builtin_HEXAGON_M2_cnacsc_s1",
"M2.dpmpyss.acc.s0" => "__builtin_HEXAGON_M2_dpmpyss_acc_s0",
"M2.dpmpyss.nac.s0" => "__builtin_HEXAGON_M2_dpmpyss_nac_s0",
"M2.dpmpyss.rnd.s0" => "__builtin_HEXAGON_M2_dpmpyss_rnd_s0",
"M2.dpmpyss.s0" => "__builtin_HEXAGON_M2_dpmpyss_s0",
"M2.dpmpyuu.acc.s0" => "__builtin_HEXAGON_M2_dpmpyuu_acc_s0",
"M2.dpmpyuu.nac.s0" => "__builtin_HEXAGON_M2_dpmpyuu_nac_s0",
"M2.dpmpyuu.s0" => "__builtin_HEXAGON_M2_dpmpyuu_s0",
"M2.hmmpyh.rs1" => "__builtin_HEXAGON_M2_hmmpyh_rs1",
"M2.hmmpyh.s1" => "__builtin_HEXAGON_M2_hmmpyh_s1",
"M2.hmmpyl.rs1" => "__builtin_HEXAGON_M2_hmmpyl_rs1",
"M2.hmmpyl.s1" => "__builtin_HEXAGON_M2_hmmpyl_s1",
"M2.maci" => "__builtin_HEXAGON_M2_maci",
"M2.macsin" => "__builtin_HEXAGON_M2_macsin",
"M2.macsip" => "__builtin_HEXAGON_M2_macsip",
"M2.mmachs.rs0" => "__builtin_HEXAGON_M2_mmachs_rs0",
"M2.mmachs.rs1" => "__builtin_HEXAGON_M2_mmachs_rs1",
"M2.mmachs.s0" => "__builtin_HEXAGON_M2_mmachs_s0",
"M2.mmachs.s1" => "__builtin_HEXAGON_M2_mmachs_s1",
"M2.mmacls.rs0" => "__builtin_HEXAGON_M2_mmacls_rs0",
"M2.mmacls.rs1" => "__builtin_HEXAGON_M2_mmacls_rs1",
"M2.mmacls.s0" => "__builtin_HEXAGON_M2_mmacls_s0",
"M2.mmacls.s1" => "__builtin_HEXAGON_M2_mmacls_s1",
"M2.mmacuhs.rs0" => "__builtin_HEXAGON_M2_mmacuhs_rs0",
"M2.mmacuhs.rs1" => "__builtin_HEXAGON_M2_mmacuhs_rs1",
"M2.mmacuhs.s0" => "__builtin_HEXAGON_M2_mmacuhs_s0",
"M2.mmacuhs.s1" => "__builtin_HEXAGON_M2_mmacuhs_s1",
"M2.mmaculs.rs0" => "__builtin_HEXAGON_M2_mmaculs_rs0",
"M2.mmaculs.rs1" => "__builtin_HEXAGON_M2_mmaculs_rs1",
"M2.mmaculs.s0" => "__builtin_HEXAGON_M2_mmaculs_s0",
"M2.mmaculs.s1" => "__builtin_HEXAGON_M2_mmaculs_s1",
"M2.mmpyh.rs0" => "__builtin_HEXAGON_M2_mmpyh_rs0",