From 230f29b602420efe60c3cd0de124e3b9b1b28ed6 Mon Sep 17 00:00:00 2001 From: Matthew Maurer Date: Fri, 14 Nov 2025 19:25:34 +0000 Subject: [PATCH] aarch64: Remove withdrawn FEAT_TME ARM has withdrawn FEAT_TME https://developer.arm.com/documentation/102105/lb-05/ LLVM has also dropped support for enabling the feature. --- .../aarch64-unknown-linux-gnu/Dockerfile | 3 +- .../aarch64_be-unknown-linux-gnu/Dockerfile | 1 - crates/core_arch/src/aarch64/mod.rs | 4 - crates/core_arch/src/aarch64/tme.rs | 201 ------------------ crates/stdarch-test/src/disassembly.rs | 2 +- crates/stdarch-verify/tests/arm.rs | 1 - 6 files changed, 2 insertions(+), 210 deletions(-) delete mode 100644 crates/core_arch/src/aarch64/tme.rs diff --git a/ci/docker/aarch64-unknown-linux-gnu/Dockerfile b/ci/docker/aarch64-unknown-linux-gnu/Dockerfile index 70c0650975..2768c521eb 100644 --- a/ci/docker/aarch64-unknown-linux-gnu/Dockerfile +++ b/ci/docker/aarch64-unknown-linux-gnu/Dockerfile @@ -15,5 +15,4 @@ RUN apt-get update && apt-get install -y --no-install-recommends \ ENV CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER=aarch64-linux-gnu-gcc \ CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64 -cpu max -L /usr/aarch64-linux-gnu" \ - OBJDUMP=aarch64-linux-gnu-objdump \ - STDARCH_TEST_SKIP_FEATURE=tme + OBJDUMP=aarch64-linux-gnu-objdump diff --git a/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile b/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile index 56ddbd990b..f85c6a2592 100644 --- a/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile +++ b/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile @@ -27,4 +27,3 @@ ENV AARCH64_BE_LIBC="${AARCH64_BE_TOOLCHAIN}/aarch64_be-none-linux-gnu/libc" ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_LINKER="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-gcc" ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64_be -cpu max -L ${AARCH64_BE_LIBC}" ENV OBJDUMP="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-objdump" -ENV STDARCH_TEST_SKIP_FEATURE=tme diff --git a/crates/core_arch/src/aarch64/mod.rs b/crates/core_arch/src/aarch64/mod.rs index f4b9b1c302..b48bdac57e 100644 --- a/crates/core_arch/src/aarch64/mod.rs +++ b/crates/core_arch/src/aarch64/mod.rs @@ -21,10 +21,6 @@ mod neon; #[stable(feature = "neon_intrinsics", since = "1.59.0")] pub use self::neon::*; -mod tme; -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub use self::tme::*; - mod prefetch; #[unstable(feature = "stdarch_aarch64_prefetch", issue = "117217")] pub use self::prefetch::*; diff --git a/crates/core_arch/src/aarch64/tme.rs b/crates/core_arch/src/aarch64/tme.rs deleted file mode 100644 index 207633c1f8..0000000000 --- a/crates/core_arch/src/aarch64/tme.rs +++ /dev/null @@ -1,201 +0,0 @@ -//! ARM's Transactional Memory Extensions (TME). -//! -//! This CPU feature is available on Aarch64 - A architecture profile. -//! This feature is in the non-neon feature set. TME specific vendor documentation can -//! be found [TME Intrinsics Introduction][tme_intrinsics_intro]. -//! -//! The reference is [ACLE Q4 2019][acle_q4_2019_ref]. -//! -//! ACLE has a section for TME extensions and state masks for aborts and failure codes. -//! [ARM A64 Architecture Register Datasheet][a_profile_future] also describes possible failure code scenarios. -//! -//! [acle_q4_2019_ref]: https://static.docs.arm.com/101028/0010/ACLE_2019Q4_release-0010.pdf -//! [tme_intrinsics_intro]: https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics -//! [llvm_aarch64_int]: https://github.com/llvm/llvm-project/commit/a36d31478c182903523e04eb271bbf102bfab2cc#diff-ff24e1c35f4d54f1110ce5d90c709319R626-R646 -//! [a_profile_future]: https://static.docs.arm.com/ddi0601/a/SysReg_xml_futureA-2019-04.pdf?_ga=2.116560387.441514988.1590524918-1110153136.1588469296 - -#[cfg(test)] -use stdarch_test::assert_instr; - -unsafe extern "unadjusted" { - #[link_name = "llvm.aarch64.tstart"] - fn aarch64_tstart() -> u64; - #[link_name = "llvm.aarch64.tcommit"] - fn aarch64_tcommit(); - #[link_name = "llvm.aarch64.tcancel"] - fn aarch64_tcancel(imm0: u64); - #[link_name = "llvm.aarch64.ttest"] - fn aarch64_ttest() -> u64; -} - -/// Transaction successfully started. -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMSTART_SUCCESS: u64 = 0x00_u64; - -/// Extraction mask for failure reason -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_REASON: u64 = 0x00007FFF_u64; - -/// Transaction retry is possible. -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_RTRY: u64 = 1 << 15; - -/// Transaction executed a TCANCEL instruction -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_CNCL: u64 = 1 << 16; - -/// Transaction aborted because a conflict occurred -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_MEM: u64 = 1 << 17; - -/// Fallback error type for any other reason -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_IMP: u64 = 1 << 18; - -/// Transaction aborted because a non-permissible operation was attempted -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_ERR: u64 = 1 << 19; - -/// Transaction aborted due to read or write set limit was exceeded -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_SIZE: u64 = 1 << 20; - -/// Transaction aborted due to transactional nesting level was exceeded -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_NEST: u64 = 1 << 21; - -/// Transaction aborted due to a debug trap. -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_DBG: u64 = 1 << 22; - -/// Transaction failed from interrupt -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_INT: u64 = 1 << 23; - -/// Indicates a TRIVIAL version of TM is available -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub const _TMFAILURE_TRIVIAL: u64 = 1 << 24; - -// NOTE: Tests for these instructions are disabled on MSVC as dumpbin doesn't -// understand these instructions. - -/// Starts a new transaction. When the transaction starts successfully the return value is 0. -/// If the transaction fails, all state modifications are discarded and a cause of the failure -/// is encoded in the return value. -/// -/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics). -#[inline] -#[target_feature(enable = "tme")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(tstart))] -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub unsafe fn __tstart() -> u64 { - aarch64_tstart() -} - -/// Commits the current transaction. For a nested transaction, the only effect is that the -/// transactional nesting depth is decreased. For an outer transaction, the state modifications -/// performed transactionally are committed to the architectural state. -/// -/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics). -#[inline] -#[target_feature(enable = "tme")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(tcommit))] -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub unsafe fn __tcommit() { - aarch64_tcommit() -} - -/// Cancels the current transaction and discards all state modifications that were performed transactionally. -/// -/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics). -#[inline] -#[target_feature(enable = "tme")] -#[cfg_attr( - all(test, not(target_env = "msvc")), - assert_instr(tcancel, IMM16 = 0x0) -)] -#[rustc_legacy_const_generics(0)] -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub unsafe fn __tcancel() { - static_assert!(IMM16 <= 65535); - aarch64_tcancel(IMM16); -} - -/// Tests if executing inside a transaction. If no transaction is currently executing, -/// the return value is 0. Otherwise, this intrinsic returns the depth of the transaction. -/// -/// [ARM TME Intrinsics](https://developer.arm.com/docs/101028/0010/transactional-memory-extension-tme-intrinsics). -#[inline] -#[target_feature(enable = "tme")] -#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ttest))] -#[unstable(feature = "stdarch_aarch64_tme", issue = "117216")] -pub unsafe fn __ttest() -> u64 { - aarch64_ttest() -} - -#[cfg(test)] -mod tests { - use stdarch_test::simd_test; - - use crate::core_arch::aarch64::*; - - const CANCEL_CODE: u64 = (0 | (0x123 & _TMFAILURE_REASON) as u64) as u64; - - #[simd_test(enable = "tme")] - unsafe fn test_tstart() { - let mut x = 0; - for i in 0..10 { - let code = tme::__tstart(); - if code == _TMSTART_SUCCESS { - x += 1; - assert_eq!(x, i + 1); - break; - } - assert_eq!(x, 0); - } - } - - #[simd_test(enable = "tme")] - unsafe fn test_tcommit() { - let mut x = 0; - for i in 0..10 { - let code = tme::__tstart(); - if code == _TMSTART_SUCCESS { - x += 1; - assert_eq!(x, i + 1); - tme::__tcommit(); - } - assert_eq!(x, i + 1); - } - } - - #[simd_test(enable = "tme")] - unsafe fn test_tcancel() { - let mut x = 0; - - for i in 0..10 { - let code = tme::__tstart(); - if code == _TMSTART_SUCCESS { - x += 1; - assert_eq!(x, i + 1); - tme::__tcancel::(); - break; - } - } - - assert_eq!(x, 0); - } - - #[simd_test(enable = "tme")] - unsafe fn test_ttest() { - for _ in 0..10 { - let code = tme::__tstart(); - if code == _TMSTART_SUCCESS { - if tme::__ttest() == 2 { - tme::__tcancel::(); - break; - } - } - } - } -} diff --git a/crates/stdarch-test/src/disassembly.rs b/crates/stdarch-test/src/disassembly.rs index 4c136cff02..237e8d2dc2 100644 --- a/crates/stdarch-test/src/disassembly.rs +++ b/crates/stdarch-test/src/disassembly.rs @@ -78,7 +78,7 @@ pub(crate) fn disassemble_myself() -> HashSet { let objdump = env::var("OBJDUMP").unwrap_or_else(|_| "objdump".to_string()); let add_args = if cfg!(target_vendor = "apple") && cfg!(target_arch = "aarch64") { // Target features need to be enabled for LLVM objdump on Darwin ARM64 - vec!["--mattr=+v8.6a,+crypto,+tme"] + vec!["--mattr=+v8.6a,+crypto"] } else if cfg!(any(target_arch = "riscv32", target_arch = "riscv64")) { vec!["--mattr=+zk,+zks,+zbc,+zbb"] } else { diff --git a/crates/stdarch-verify/tests/arm.rs b/crates/stdarch-verify/tests/arm.rs index a35b8175fb..86897908e0 100644 --- a/crates/stdarch-verify/tests/arm.rs +++ b/crates/stdarch-verify/tests/arm.rs @@ -444,7 +444,6 @@ fn verify_all_signatures() { && !rust.file.ends_with("v6.rs\"") && !rust.file.ends_with("v7.rs\"") && !rust.file.ends_with("v8.rs\"") - && !rust.file.ends_with("tme.rs\"") && !rust.file.ends_with("mte.rs\"") && !rust.file.ends_with("ex.rs\"") && !skip_intrinsic_verify.contains(&rust.name)