Skip to content
This repository

A detailed michroarchitectural x86 simulator

branch: master

Fetching latest commit…


Cannot retrieve the latest commit at this time

Octocat-spinner-32 DRAMSim2 @ e0849ce
Octocat-spinner-32 ZCOMPS-MC
Octocat-spinner-32 ZCOMPS-bpred
Octocat-spinner-32 ZCOMPS-btb
Octocat-spinner-32 ZCOMPS-coherence
Octocat-spinner-32 ZCOMPS-dram
Octocat-spinner-32 ZCOMPS-dvfs
Octocat-spinner-32 ZCOMPS-fusion
Octocat-spinner-32 ZCOMPS-memdep
Octocat-spinner-32 ZCOMPS-prefetch
Octocat-spinner-32 ZCOMPS-ras
Octocat-spinner-32 ZCOMPS-repeater
Octocat-spinner-32 ZCORE-power
Octocat-spinner-32 ZPIPE-alloc
Octocat-spinner-32 ZPIPE-commit
Octocat-spinner-32 ZPIPE-decode
Octocat-spinner-32 ZPIPE-exec
Octocat-spinner-32 ZPIPE-fetch
Octocat-spinner-32 config
Octocat-spinner-32 doc
Octocat-spinner-32 dram-config
Octocat-spinner-32 mcpat Notice CXX overrides in build November 14, 2013
Octocat-spinner-32 mem-repeater @ 6839639
Octocat-spinner-32 pintool
Octocat-spinner-32 scripts
Octocat-spinner-32 tests
Octocat-spinner-32 .gitignore
Octocat-spinner-32 .gitmodules
Octocat-spinner-32 COPYING
Octocat-spinner-32 INSTALL.zesto
Octocat-spinner-32 Makefile
Octocat-spinner-32 README
Octocat-spinner-32 README.zesto
Octocat-spinner-32 WARRANTY
Octocat-spinner-32 buffer.cpp
Octocat-spinner-32 buffer.h
Octocat-spinner-32 callbacks.c
Octocat-spinner-32 callbacks.h
Octocat-spinner-32 eval.c
Octocat-spinner-32 eval.h
Octocat-spinner-32 handshake_container.h
Octocat-spinner-32 helix.h
Octocat-spinner-32 host.h
Octocat-spinner-32 interface.h
Octocat-spinner-32 machine.c
Octocat-spinner-32 machine.def
Octocat-spinner-32 machine.h
Octocat-spinner-32 memory.c
Octocat-spinner-32 memory.h
Octocat-spinner-32 misc.c
Octocat-spinner-32 misc.h
Octocat-spinner-32 options.c
Octocat-spinner-32 options.h
Octocat-spinner-32 pin.h
Octocat-spinner-32 regs.h
Octocat-spinner-32 sim-main.c
Octocat-spinner-32 sim-slave.cpp
Octocat-spinner-32 sim.h
Octocat-spinner-32 slave.c
Octocat-spinner-32 slices.cpp
Octocat-spinner-32 spec_pin.con
Octocat-spinner-32 spec_pinpoints.con
Octocat-spinner-32 stats.c
Octocat-spinner-32 stats.h
Octocat-spinner-32 synchronization.h
Octocat-spinner-32 thread.h
Octocat-spinner-32 valcheck.h
Octocat-spinner-32 version.h
Octocat-spinner-32 x86flow.def
Octocat-spinner-32 zesto-MC.cpp
Octocat-spinner-32 zesto-MC.h
Octocat-spinner-32 zesto-alloc.cpp
Octocat-spinner-32 zesto-alloc.h
Octocat-spinner-32 zesto-bpred.cpp
Octocat-spinner-32 zesto-bpred.h
Octocat-spinner-32 zesto-cache.cpp
Octocat-spinner-32 zesto-cache.h
Octocat-spinner-32 zesto-coherence.cpp
Octocat-spinner-32 zesto-coherence.h
Octocat-spinner-32 zesto-commit.cpp
Octocat-spinner-32 zesto-commit.h
Octocat-spinner-32 zesto-core.cpp
Octocat-spinner-32 zesto-core.h
Octocat-spinner-32 zesto-decode.cpp
Octocat-spinner-32 zesto-decode.h
Octocat-spinner-32 zesto-dram.cpp
Octocat-spinner-32 zesto-dram.h
Octocat-spinner-32 zesto-dvfs.cpp
Octocat-spinner-32 zesto-dvfs.h
Octocat-spinner-32 zesto-exec.cpp
Octocat-spinner-32 zesto-exec.h
Octocat-spinner-32 zesto-fetch.cpp
Octocat-spinner-32 zesto-fetch.h
Octocat-spinner-32 zesto-memdep.cpp
Octocat-spinner-32 zesto-memdep.h
Octocat-spinner-32 zesto-noc.cpp
Octocat-spinner-32 zesto-noc.h
Octocat-spinner-32 zesto-opts.cpp
Octocat-spinner-32 zesto-opts.h
Octocat-spinner-32 zesto-oracle.cpp
Octocat-spinner-32 zesto-oracle.h
Octocat-spinner-32 zesto-power.cpp
Octocat-spinner-32 zesto-power.h
Octocat-spinner-32 zesto-prefetch.cpp
Octocat-spinner-32 zesto-prefetch.h
Octocat-spinner-32 zesto-repeater.cpp
Octocat-spinner-32 zesto-repeater.h
Octocat-spinner-32 zesto-structs.h
Octocat-spinner-32 zesto-uncore.cpp
Octocat-spinner-32 zesto-uncore.h
XIOSim 0.3 Pre-release
Svilen Kanev,
Harvard University, 2013
XIOSim is a detailed user-mode microarchitectural simulator for the x86 architecture. It features detailed models for in-order (Atom-like) and out-of-order (Nehalem-like) cores, tightly integrated power models and integrates with existing Pintools.

XIOSim builds up on and integrates a significant amount of others' work:
- the out-of-order performance model from the Zesto framework.
- the Pin binary instrumentation engine.
- the power models from McPAT.
- the DRAM models from DRAMSim2.

Pin kit version 2.12
Available at


0. Set PIN_HOME in pintool/makefile to pin kit location
2. Build pintool
cd pintool; make

Additional build targets:
- make libd (slave mode with tracing enabled -- on error, last 50,000 lines of trace are added to the output file)
- make tags (generate ctags)
- make clean

- cd pintool; make debug (adds a trace of syscalls to simulator output)

REBUILDING: After making changes to the simulator core, you first need to rebuild libsim. In the root of the simulator, do "make; cd pintool; make".

REQUIREMENTS: Recent version of GCC including some C++11 features (GCC 4.5+ should be ok). We use GCC 4.7.2.

Running as a pintool frees the simulator for certain responsibilities, like implementing an elf file loader and emulating/dispatching system calls. Instead, these are done natively by the host operating system, and we only grab information that is relevant for simulation.

Flags should be given in this order:

Pin flags [immediately after pin executable].

Pintool flags [after -t in command line]:
-ppfile, skip, etc. -- as defined by the CONTROLLER_PINPOINT class.
-skip -- exit after a number of simulated instructions.
-parsec -- support for the Parsec suite region-of-interest (ROI).
-pthreads -- EXPERIMENTAL support for pthreads synchronization.
-iljit -- Experimental support for running the high-level VM ILDJIT on top of the simulator.

Simulator command line flags [after -s in command line]:
-f.e. -redir:sim to redirect simulator output (see Zesto documentation).

Simulated executable and parameters [after -- in command line].

Setting the "-power" option to true (either in the configuration file or through the simulator command line) enables power computation. Power statistics for the whole duration of the simulation (or the current simulation slice) are appended to the appropriate output file.

Setting the "-power:rtp_interval" and "-power:rtp_file" options allows generating power traces that track core and uncore dynamic power every "rtp_interval" cycles.

Performance overheads: Power simulation adds a significant overhead to simulator start times and memory consumption during initialization, while the McPAT power models are trained. After initialization, there is no significant performance overhead, regardless whether power traces are generated.

Running under Pin and sharing its address space can cause issues with repeatability of the results between runs. This can completely ruin techniques that require the exact same call path, like PinPoints. To mitigate that:
- disable address space randomization (f.e. "setarch i686 -3BL");
- clear the environment (f.e. "/usr/bin/env -i"); note that all paths need to be absolute after this;
- run Pin with the "-separate_memory" flag to minimize issues with sharing of a single address space;

The simulator supports user-mode, 32-bit instructions. Some basic SSE instructions are supported for doing floating point, but by no means the whole extension set (a warning is printed if more than 2% instructions are unsupported. In that case, ping Svilen to add your fancy instructions).
Support for 64-bit mode, SSEx and/or AVX is planned.

Because OS functions are executed by the host OS itself, support for segmenting is limited to the ES and GS registers. The gcc/glibc/Linux toolchain appears to set other segment registers to a segment base of 0, so this is not a big issue. Note that other OS/compiler combinations may not do that.
Something went wrong with that request. Please try again.