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A detailed michroarchitectural x86 simulator
branch: master

Kill simulation after last slice finishes.

Don't waste time fast-forwarding until a clean app exit.

BUG=XIOSIM-1

Change-Id: I925ca780d829b9a0f0dbeeaad3018284d86d7855
latest commit a0ed5e8309
Svilen Kanev authored
Failed to load latest commit information.
DRAMSim2 @ e0849ce Added DRAMSim2 as a git submodule
ZCOMPS-MC Hook rtp power model back up.
ZCOMPS-bpred Add support for OoO power models. Necessary counters in pipes and cou…
ZCOMPS-btb Clean up ancient libc duplicates.
ZCOMPS-coherence Initial split of global clock to local ones.
ZCOMPS-dram Initial split of global clock to local ones.
ZCOMPS-dvfs Scale leakage and dynamic with dvfs policy.
ZCOMPS-fusion importing zesto-prerelease-v0.2b
ZCOMPS-memdep Initial split of global clock to local ones.
ZCOMPS-prefetch Fixed typo in comment
ZCOMPS-ras Added more stats to IO core.
ZCOMPS-repeater Merge branch 'ooo_fix'
ZCORE-power Support for runtime power traces.
ZPIPE-alloc Clean up helix-specific stuff from pipe.
ZPIPE-commit Commit more than one senior store per cycle.
ZPIPE-decode First step at ignore API that fixes npc != pc + len.
ZPIPE-exec Clean up helix-specific stuff from pipe.
ZPIPE-fetch Recompute num_Mops_nuked from shadow_MopQ.
config Helix io config changes
doc importing zesto-prerelease-v0.2b
dram-config DDR2-533 model based on correct chip. Use with pinpoints.
mcpat Notice CXX overrides in build
mem-repeater @ a44428d Command line options for heavy waits and data cache mode
pintool Kill simulation after last slice finishes.
scripts Scripting.
tests Trivial multithreaded test.
.gitignore Proper ignore file.
.gitmodules Minor merge corrections from big coherency merge
COPYING importing zesto-prerelease-v0.2b
INSTALL.zesto Documentation update.
Makefile use CXX for libsim
README Readme
README.zesto Documentation update.
WARRANTY importing zesto-prerelease-v0.2b
buffer.cpp Relatively major exec model changes.
buffer.h Relatively major exec model changes.
callbacks.c Limit sim memory accesses. Still crude.
callbacks.h Limit sim memory accesses. Still crude.
eval.c Clean up ancient libc duplicates.
eval.h Added lots of const qualifiers that should have been there on char *-…
handshake_container.h Relatively major exec model changes.
helix.h Clean up helix-specific stuff from pipe.
host.h More legacy cleanups.
interface.h Clean up helix-specific stuff from pipe.
machine.c Per-core ztrace file.
machine.def Fix GRP15 decoding masks (fences).
machine.h Per-core ztrace file.
make_def_lists.pl Stub no dvfs class.
memory.c Per-core ztrace file.
memory.h Remove unused memory accessors.
misc.c ztrace doesn't need locking after 1a2eb42.
misc.h Per-core ztrace file.
options.c Clean up ancient libc duplicates.
options.h Added lots of const qualifiers that should have been there on char *-…
pin.h First step at ignore API that fixes npc != pc + len.
regs.h Per-core ztrace file.
sim-main.c Global deadlock watchdog. No need to wait 50M inst to catch a deadloc…
sim-slave.cpp Deadlock threshold accounts for inactive cores.
sim.h More legacy cleanups.
slave.c Recompute num_Mops_nuked from shadow_MopQ.
slices.cpp Clean up ancient libc duplicates.
spec_pin.con Merging trunk changes to atom branch.
spec_pinpoints.con Scripting.
stats.c Properly print u64 stats.
stats.h Support for runtime power traces.
synchronization.h Merge branch 'master' of file:///group/brooks/git/Zesto
thread.h Global deadlock watchdog. No need to wait 50M inst to catch a deadloc…
valcheck.h importing zesto-prerelease-v0.2b
version.h importing zesto-prerelease-v0.2b
x86flow.def Simple incomplete mfence.
zesto-MC.cpp Merge branch 'helixify' into coherency
zesto-MC.h Added DRAMSim2 as a git submodule
zesto-alloc.cpp Clean up helix-specific stuff from pipe.
zesto-alloc.h importing zesto-prerelease-v0.2b
zesto-bpred.cpp Clean up ancient libc duplicates.
zesto-bpred.h Calculate overall branch rate.
zesto-cache.cpp Per-core ztrace file.
zesto-cache.h Per-core ztrace file.
zesto-coherence.cpp Trivial const-latency coherence.
zesto-coherence.h Minor fixes to const coherence.
zesto-commit.cpp Dump in-flight insts on assert failure.
zesto-commit.h Larger deadlock threshold.
zesto-core.cpp Actually create dvfs controller.
zesto-core.h More legacy cleanups.
zesto-decode.cpp Merge branch 'atom'
zesto-decode.h importing zesto-prerelease-v0.2b
zesto-dram.cpp Finishing the stat scaling.
zesto-dram.h importing zesto-prerelease-v0.2b
zesto-dvfs.cpp Scale leakage and dynamic with dvfs policy.
zesto-dvfs.h Scale leakage and dynamic with dvfs policy.
zesto-exec.cpp Typo in comment string
zesto-exec.h Clean up helix-specific stuff from pipe.
zesto-fetch.cpp More legacy cleanups.
zesto-fetch.h First step at ignore API that fixes npc != pc + len.
zesto-memdep.cpp Stub no dvfs class.
zesto-memdep.h Initial split of global clock to local ones.
zesto-noc.cpp Assume llc latency is specified in cpu cycles.
zesto-noc.h Merge branch 'master' into dvfs
zesto-opts.cpp Allow ztrace param without debug build.
zesto-opts.h Dump in-flight insts on assert failure.
zesto-oracle.cpp Marks STAs as sync_ops too.
zesto-oracle.h Recompute num_Mops_nuked from shadow_MopQ.
zesto-power.cpp Scale leakage and dynamic with dvfs policy.
zesto-power.h Scale leakage and dynamic with dvfs policy.
zesto-prefetch.cpp Put prefetchers back in
zesto-prefetch.h Added initial 'two level' prefetcher, better handles consistant strid…
zesto-repeater.cpp Stub module for repeaterlib.
zesto-repeater.h Allow repeater to be clocked at core clock.
zesto-structs.h LSQ support for conservative lfence.
zesto-uncore.cpp Clean up ancient libc duplicates.
zesto-uncore.h Simulated time counter.

README

XIOSim 0.3 Pre-release
Svilen Kanev,
Harvard University, 2013
===================================================
XIOSim is a detailed user-mode microarchitectural simulator for the x86 architecture. It features detailed models for in-order (Atom-like) and out-of-order (Nehalem-like) cores, tightly integrated power models and integrates with existing Pintools.

XIOSim builds up on and integrates a significant amount of others' work:
- the out-of-order performance model from the Zesto framework.
- the Pin binary instrumentation engine.
- the power models from McPAT.
- the DRAM models from DRAMSim2.

===================================================
REQUIREMENTS:
Pin kit version 2.14
Available at http://www.pintool.org/downloads.html

===================================================
BUILD INSTRUCTIONS:

0. Set PIN_HOME in pintool/makefile to pin kit location
2. Build pintool
cd pintool; make

Additional build targets:
- make libd (slave mode with tracing enabled -- on error, last 50,000 lines of trace are added to the output file)
- make tags (generate ctags)
- make clean

- cd pintool; make debug (adds a trace of syscalls to simulator output)

REBUILDING: After making changes to the simulator core, you first need to rebuild libsim. In the root of the simulator, do "make; cd pintool; make".

REQUIREMENTS: Recent version of GCC including some C++11 features (GCC 4.5+ should be ok). We use GCC 4.7.2.

===================================================
RUNNING IN SLAVE MODE:
Running as a pintool frees the simulator for certain responsibilities, like implementing an elf file loader and emulating/dispatching system calls. Instead, these are done natively by the host operating system, and we only grab information that is relevant for simulation.

Flags should be given in this order:

Pin flags [immediately after pin executable].

Pintool flags [after -t in command line]:
-ppfile, skip, etc. -- as defined by the CONTROLLER_PINPOINT class.
-skip -- exit after a number of simulated instructions.
-parsec -- support for the Parsec suite region-of-interest (ROI).
-pthreads -- EXPERIMENTAL support for pthreads synchronization.
-iljit -- Experimental support for running the high-level VM ILDJIT on top of the simulator.

Simulator command line flags [after -s in command line]:
-f.e. -redir:sim to redirect simulator output (see Zesto documentation).

Simulated executable and parameters [after -- in command line].

===================================================
SIMULATING POWER:
Setting the "-power" option to true (either in the configuration file or through the simulator command line) enables power computation. Power statistics for the whole duration of the simulation (or the current simulation slice) are appended to the appropriate output file.

Setting the "-power:rtp_interval" and "-power:rtp_file" options allows generating power traces that track core and uncore dynamic power every "rtp_interval" cycles.

Performance overheads: Power simulation adds a significant overhead to simulator start times and memory consumption during initialization, while the McPAT power models are trained. After initialization, there is no significant performance overhead, regardless whether power traces are generated.

===================================================
STABILITY NOTE:
Running under Pin and sharing its address space can cause issues with repeatability of the results between runs. This can completely ruin techniques that require the exact same call path, like PinPoints. To mitigate that:
- disable address space randomization (f.e. "setarch i686 -3BL");
- clear the environment (f.e. "/usr/bin/env -i"); note that all paths need to be absolute after this;
- run Pin with the "-separate_memory" flag to minimize issues with sharing of a single address space;

===================================================
ISA SUPPORT:
The simulator supports user-mode, 32-bit instructions. Some basic SSE instructions are supported for doing floating point, but by no means the whole extension set (a warning is printed if more than 2% instructions are unsupported. In that case, ping Svilen to add your fancy instructions).
Support for 64-bit mode, SSEx and/or AVX is planned.

===================================================
SEGMENTATION SUPPORT NOTE:
Because OS functions are executed by the host OS itself, support for segmenting is limited to the ES and GS registers. The gcc/glibc/Linux toolchain appears to set other segment registers to a segment base of 0, so this is not a big issue. Note that other OS/compiler combinations may not do that.
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