{"payload":{"header_redesign_enabled":false,"results":[{"id":"476222840","archived":false,"color":"#DAE1C2","followers":4,"has_funding_file":false,"hl_name":"saweraxahra/AHB-lite-Verification-in-SystemVerilog","hl_trunc_description":"EE-599f SoC SystemVerilog Final Project","language":"SystemVerilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":476222840,"name":"AHB-lite-Verification-in-SystemVerilog","owner_id":98219102,"owner_login":"saweraxahra","updated_at":"2022-04-21T21:00:08.607Z","has_issues":true}},"sponsorable":false,"topics":["fpga","verilog","systemverilog","ahb3-lite","ahb3lite-memory","verification-code"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":62,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Asaweraxahra%252FAHB-lite-Verification-in-SystemVerilog%2B%2Blanguage%253ASystemVerilog","metadata":null,"csrf_tokens":{"/saweraxahra/AHB-lite-Verification-in-SystemVerilog/star":{"post":"UJmYHpbo2G9CD3C4yLwjc_CLgroGVuUjx9olNeHUg4dE9xd-f3ytoEzl3aTdHEwVYu2aG2zWM6P-0HTkvM0zxA"},"/saweraxahra/AHB-lite-Verification-in-SystemVerilog/unstar":{"post":"GOEJgi8tIyT9-O0NLGCrBpYqtnA7myjkh99Ne5GPk2J__q-Mttr5DcwkXIU6jnSaC3t7GLu2cmQweUt04EyJrg"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"DgBDfwZz62rk13Q5Wb5ogZRbhSE-YqmVuy8YqiuRjdhVApTndLhZiuIZNVMnP7WUunRap0ebWa658Vav29dmpA"}}},"title":"Repository search results"}