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From dce8d05752a47edd4dd56f41bb05ae0d41557940 Mon Sep 17 00:00:00 2001
From: Scott Ellis <scott@jumpnowtek.com>
Date: Tue, 6 Jan 2015 05:18:32 -0500
Subject: [PATCH 5/6] omap4: prcm: use defined constants in reset function
---
sys/arm/ti/omap4/omap4_prcm_clks.c | 27 +++++++++++++++++++++------
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git sys/arm/ti/omap4/omap4_prcm_clks.c sys/arm/ti/omap4/omap4_prcm_clks.c
index 4eeb5da..1994a23 100644
--- sys/arm/ti/omap4/omap4_prcm_clks.c
+++ sys/arm/ti/omap4/omap4_prcm_clks.c
@@ -135,6 +135,10 @@ __FBSDID("$FreeBSD: head/sys/arm/ti/omap4/omap4_prcm_clks.c 266648 2014-05-25 10
#define CM_ABE_PLL_REF_CLKSEL_OFFSET (CKGEN_PRM_OFFSET + 0x000CUL)
#define CM_SYS_CLKSEL_OFFSET (CKGEN_PRM_OFFSET + 0x0010UL)
+#define PRM_RSTCTRL_OFFSET 0x00001B00UL
+#define PRM_RSTCTRL_RST_GLOBAL_WARM 0x000000001L
+#define PRM_RSTCTRL_RST_GLOBAL_COLD 0x000000002L
+
/**
* Address offsets from the SCRM memory region to the top level clock control
* registers. More registers are available.
@@ -1585,16 +1589,27 @@ omap4_clk_aux_get_source_freq(struct ti_clock_dev *clkdev,
return (38400000 / divider);
}
-#define PRM_RSTCTRL 0x1b00
-#define PRM_RSTCTRL_RESET 0x2
-
static void
omap4_prcm_reset(void)
{
struct omap4_prcm_softc *sc = omap4_prcm_sc;
- bus_write_4(sc->sc_res[0], PRM_RSTCTRL,
- bus_read_4(sc->sc_res[0], PRM_RSTCTRL) | PRM_RSTCTRL_RESET);
- bus_read_4(sc->sc_res[0], PRM_RSTCTRL);
+ struct resource *mem_res;
+ uint32_t reg;
+
+ if (sc == NULL)
+ return;
+
+ mem_res = sc->sc_res[PRM_INSTANCE_MEM_REGION];
+
+ if (mem_res == NULL)
+ return;
+
+ reg = bus_read_4(mem_res, PRM_RSTCTRL_OFFSET);
+
+ bus_write_4(mem_res, PRM_RSTCTRL_OFFSET,
+ reg | PRM_RSTCTRL_RST_GLOBAL_COLD);
+
+ bus_read_4(mem_res, PRM_RSTCTRL_OFFSET);
}
/**