This project is an SOC (System on a Chip) coded in VHDL and implemented for the Lattice iCE40-hx8k dev board. The SOC contains the following components: 6800 CPU + UART + Timer + I/O Ports
- Lattice iCE40-hx8k dev board (can be ordered online at www.latticesemi.com)
- USB-to-Serial 3.3V adapter (can be ordered from eBay)
- misc USB cables and wires for connecting the USB-to-Serial adapter
NOTE: Make sure the USB-to-serial adapter is a 3.3V version. Some adapters have 5V interface signals which could damage your iCE40-hx8k dev board.
- IceCube2 (from Lattice Semiconductor) was used for synthesis and FPGA Routing.
- Icestorm (https:/github.com/cliffordwolf/icestorm) was used for programming.
I used the Lattice IceCube2 software to generate the SOC_bitmap.bin programming file and then I used this command line "iceprog SOC_bitmap.bin" the program the iCE40-hx8k dev board over the USB cable (iceprog is part of the icestorm tool suite).
I used the minicom program (on Ubuntu Linux) as a console to communicate with the 6800 SOC over the USB-to-Serial connection. Configure minicom using the command line "minicom -s" to configure the serial port for ttyUSB0 and turn of the hardware handshaking. There are probably other alternatives to minicom. Any ANSI terminal-emulator program should work for this application.
The iCE40 pins are defined as follows:
UART_RXD G1 -pullup yes UART_TXD G2 PORTA B5 PORTA B4 PORTA A2 PORTA A1 PORTA C5 PORTA C4 PORTA B3 PORTA C3 RESET N3 -pullup yes CLK J3 -pullup yes
6800 CPU Background Info
The 6800 is an eight-bit microprocessor introduced by Motorola in 1974. Its instruction-set architecture is influenced by the PDP-11 mini computer, particularly with respect to the concept of instruction with multiple addressing modes. The 6800 has 72 instructions and 7 addressing modes. While not completely orthogonal, these instructions and addressing modes can be combined to compose 197 opcodes. It has two 8-bit accumulators (A&B)that can be combined into a single 16-bit register (D). It has a 16-bit address bus and also features 16-bit index registers and stack pointer.
- Scott L Baker - SOC design
See the LICENSE file in this repository