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@IBM @PSML @bu-icsg @freechipsproject
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Pinned

  1. Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

    Scala 139 28

  2. Repository for basic (and not so basic) Verilog blocks with high re-use potential

    Verilog 201 73

  3. Tests for example Rocket Custom Coprocessors

    C 34 17

  4. C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)

    C 26 10

  5. A fault-injection framework using Chisel and FIRRTL

    Scala 18 9

  6. Major mode for editing FIRRTL files in Emacs

    Emacs Lisp 1 4

815 contributions in the last year

Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Mon Wed Fri

Contribution activity

November 2019

Created a pull request in freechipsproject/firrtl that received 1 comment

Updates for sbt usage of scalafmt

I tried to run the formatted-1 branch locally, but sbt wanted these modifications. Specifically, it wants the file to be called .scalafmt.conf not .…

+3 −0 1 comment
6 contributions in private repositories Nov 1 – Nov 14

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