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@ucb-bar @sifive @llvm @chipsalliance
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Pinned

  1. llvm/circt Public

    Circuit IR Compilers and Tools

    C++ 921 120

  2. Flexible Intermediate Representation for RTL

    Scala 525 159

  3. Chisel 3: A Modern Hardware Design Language

    Scala 2.5k 450

  4. Library to compile Chisel circuits using LLVM/MLIR (CIRCT)

    Scala 40 5

  5. C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)

    C 47 17

  6. Major mode for editing FIRRTL files in Emacs

    Emacs Lisp 2 7

1,180 contributions in the last year

May Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Mon Wed Fri
Activity overview
Contributed to llvm/circt, chipsalliance/firrtl, chipsalliance/chisel3 and 16 other repositories

Contribution activity

May 2022

Created 13 commits in 1 repository

Created a pull request in llvm/circt that received 2 comments

[FIRRTL] Add CheckResets Behavior to SFCCompat

Add SFC CheckResets logic to the SFCCompat pass. This checks that no async reset initial value is a non-constant when looking through wires, nodes,…

+69 −0 2 comments
Opened 4 other pull requests in 1 repository

Created an issue in llvm/circt that received 1 comment

[FIRRTL] Invalid Async Reset False Positive with DontTouch

If a constant wire is marked don't touch and used as the reset initial value, then CIRCT will complain that this is a "non-constant async reset val…

1 comment
Opened 1 other issue in 1 repository
4 contributions in private repositories May 3 – May 10

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