Document and example code for introductory (and not so introductory) Verilog
TeX
Switch branches/tags
Nothing to show
Fetching latest commit…
Cannot retrieve the latest commit at this time.
Permalink
Failed to load latest commit information.
.gitignore
README
verilog.tex

README

verilog_tex repo
Zafar M. Takhirov (zafar@bu.edu)
Schuyler Eldridge (schuyler.eldridge@gmail.com)
Boston University 2012

The intent of verilog.tex and the additional example code is to
provide a single resource for students in basic and advanced logic
design and computer architecture courses utilizing the Verilog HDL.