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@IBM @PSML @bu-icsg

Pinned repositories

  1. bu-icsg/dana

    Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

    Scala 39 12

  2. verilog

    Repository for basic (and not so basic) Verilog blocks with high re-use potential.

    Verilog 91 40

  3. rocket-rocc-examples

    Tests for example Rocket Custom Coprocessors

    C 9 7

  4. IBM/firrtl-mode

    Major mode for editing FIRRTL files in Emacs

    Emacs Lisp 3

  5. IBM/chiffre

    A fault-injection framework using Chisel and Firrtl


  6. IBM/rocc-software

    C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)

    C 3 2

566 contributions in the last year

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Contribution activity First pull request First issue First repository Joined GitHub

February 2018

Created a pull request in freechipsproject/firrtl that received 4 comments

Add graph summation "+" to DiGraph

I'm working through some circuit transformations and am coming across some operations which I'd like to have for graphs. This is the first. This ta…

+25 −0 4 comments

Created an issue in freechipsproject/firrtl that received 2 comments

DiGraph.BFS doesn't treat the root node as visited

Type of issue Bug report Feature request Other enhancement If the current behavior is a bug, please provide the steps to reproduce the pro…

3 of 9 2 comments

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