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arm-common: rework psci interface

Rename some macros, and, in particular, use the same naming scheme as Linux.
This scheme highlights in which version a particular function was introduced.

With this, let's also introduce PSCI version {en,de}coder macros. We will later
benefit from this macros.

No functional change.

Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
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rralf authored and jan-kiszka committed Dec 20, 2018
1 parent 23ed2b3 commit a0a90f25b1045f62c93b117457580b62a1a2f783
Showing with 37 additions and 30 deletions.
  1. +18 −11 hypervisor/arch/arm-common/include/asm/psci.h
  2. +19 −19 hypervisor/arch/arm-common/psci.c
@@ -10,15 +10,22 @@
* the COPYING file in the top-level directory.
*/

#define PSCI_VERSION 0x84000000
#define PSCI_CPU_SUSPEND_32 0x84000001
#define PSCI_CPU_SUSPEND_64 0xc4000001
#define PSCI_CPU_OFF 0x84000002
#define PSCI_CPU_ON_32 0x84000003
#define PSCI_CPU_ON_64 0xc4000003
#define PSCI_AFFINITY_INFO_32 0x84000004
#define PSCI_AFFINITY_INFO_64 0xc4000004
#define PSCI_FEATURES 0x8400000a
/* PSCI v0.2 interface */
#define PSCI_0_2_FN(n) (0x84000000 + (n))
#define PSCI_0_2_FN64(n) (0xc4000000 + (n))

#define PSCI_0_2_FN_VERSION PSCI_0_2_FN(0)
#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1)
#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2)
#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3)
#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4)

#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1)
#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3)
#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4)

/* PSCI v1.0 interface */
#define PSCI_1_0_FN_FEATURES PSCI_0_2_FN(10)

/* v0.1 function IDs as used by U-Boot */
#define PSCI_CPU_OFF_V0_1_UBOOT 0x95c1ba5f
@@ -37,8 +44,8 @@

#define PSCI_INVALID_ADDRESS (-1L)

/* Major[31:16], minor[15:0] */
#define PSCI_VERSION_1_1 0x10001
#define PSCI_VERSION_MAJOR(ver) (u16)((ver) >> 16)
#define PSCI_VERSION(major, minor) (((major) << 16) | (minor))

struct trap_context;

@@ -69,15 +69,15 @@ static long psci_emulate_affinity_info(struct trap_context *ctx)
static long psci_emulate_features_info(struct trap_context *ctx)
{
switch (ctx->regs[1]) {
case PSCI_VERSION:
case PSCI_CPU_SUSPEND_32:
case PSCI_CPU_SUSPEND_64:
case PSCI_CPU_OFF:
case PSCI_CPU_ON_32:
case PSCI_CPU_ON_64:
case PSCI_AFFINITY_INFO_32:
case PSCI_AFFINITY_INFO_64:
case PSCI_FEATURES:
case PSCI_0_2_FN_VERSION:
case PSCI_0_2_FN_CPU_SUSPEND:
case PSCI_0_2_FN64_CPU_SUSPEND:
case PSCI_0_2_FN_CPU_OFF:
case PSCI_0_2_FN_CPU_ON:
case PSCI_0_2_FN64_CPU_ON:
case PSCI_0_2_FN_AFFINITY_INFO:
case PSCI_0_2_FN64_AFFINITY_INFO:
case PSCI_1_0_FN_FEATURES:
case SMCCC_VERSION:
return PSCI_SUCCESS;

@@ -91,32 +91,32 @@ long psci_dispatch(struct trap_context *ctx)
this_cpu_public()->stats[JAILHOUSE_CPU_STAT_VMEXITS_PSCI]++;

switch (ctx->regs[0]) {
case PSCI_VERSION:
return PSCI_VERSION_1_1;
case PSCI_0_2_FN_VERSION:
return PSCI_VERSION(1, 1);

case PSCI_CPU_SUSPEND_32:
case PSCI_CPU_SUSPEND_64:
case PSCI_0_2_FN_CPU_SUSPEND:
case PSCI_0_2_FN64_CPU_SUSPEND:
if (!irqchip_has_pending_irqs()) {
asm volatile("wfi" : : : "memory");
irqchip_handle_irq();
}
return 0;

case PSCI_CPU_OFF:
case PSCI_0_2_FN_CPU_OFF:
case PSCI_CPU_OFF_V0_1_UBOOT:
arm_cpu_park();
return 0;

case PSCI_CPU_ON_32:
case PSCI_CPU_ON_64:
case PSCI_0_2_FN_CPU_ON:
case PSCI_0_2_FN64_CPU_ON:
case PSCI_CPU_ON_V0_1_UBOOT:
return psci_emulate_cpu_on(ctx);

case PSCI_AFFINITY_INFO_32:
case PSCI_AFFINITY_INFO_64:
case PSCI_0_2_FN_AFFINITY_INFO:
case PSCI_0_2_FN64_AFFINITY_INFO:
return psci_emulate_affinity_info(ctx);

case PSCI_FEATURES:
case PSCI_1_0_FN_FEATURES:
return psci_emulate_features_info(ctx);

default:

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