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Commits on Jun 5, 2018
  1. Bump version number

    jan-kiszka committed Jun 5, 2018
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  2. inmates: x86: Fix parameter space reservation with gcc-6 and newer

    jan-kiszka committed Jun 4, 2018
    Newer gcc versions optimize the cmdline out, despite the usage via
    boot_params. Make the trick less fragile by pushing the boot_params
    structure along with the 3-page reservation as union into the cmdline
    section. We will end up add the section start because the default
    cmdline is not used, thus dropped by the compiler.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on Jun 4, 2018
  1. inmates: remove superfluous include

    rralf authored and jan-kiszka committed Jun 4, 2018
    This is a fragment of an old patch series of the arm-mmu patches.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  2. Bump version number

    jan-kiszka committed Jun 4, 2018
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 31, 2018
  1. arm64: Remove unused tlb_flush_guest macro

    jan-kiszka committed May 29, 2018
    Was obsoleted upstream during the arm64 development but sneaked into the
    initial commit of that arch.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  2. driver: Catch zero-sized cell configurations

    jan-kiszka committed May 29, 2018
    We otherwise crash spectacularly.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  3. inmates: arm-common: add MMU support

    rralf authored and jan-kiszka committed May 30, 2018
    Basically, the MMU on both ARM architectures work in the same way.
    
    There are only slight differences in register naming and their content.
    But the 'same' set of registers needs to be written. By abstracting
    registers and their content to sysregs.h, we're now able to use the same
    MMU driver code for both architectures.
    
    Device drivers will ID-map the regions they are touching:
      - Base address of the inmate, length 0x10000 (results in 2MiB)
      - Communication Region, length 0x1000 (results in 2MiB)
      - UART, if existent, length 0x1000 (results in 2MiB)
      - GIC[CD|DR], length 0x1000 (results in 2MiB)
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  4. inmates: arm-common: implement common map_range routine

    rralf authored and jan-kiszka committed May 30, 2018
    map_range() id-maps pages. Pages may either be uncached (e.g., MMIO) or
    cached (e.g., RAM).
    
    On arm and arm64, we only use two level paging. On both architectures,
    we will enter level one, IOW we skip level zero on arm64. The first
    level page table (the page directory) is allocated statically, the
    second level page tables (page middle directores, which have 512
    entries) will dynamically be allocated as needed.
    
    As we only use level one and two, the paging granularity well be 2MiB
    (HUGE_PAGE_SIZE), same as for x86.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    [Jan: removed explicit asm/processor.h inclusion]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  5. inmates: arm-common: introduce processor.h

    rralf authored and jan-kiszka committed May 30, 2018
    cpu_relax() is currently defined in inmate.h. Use this chance to
    implement memory_barrier() and synchronization_barrier() as well.
    
    As ARM and ARM64 don't differ for those definitions we can use a common
    header file for both architectures.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    [Jan: keep including processor.h from inmate.h]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  6. inmates: tools: arm: linux-loader: disable MMU before starting

    rralf authored and jan-kiszka committed May 30, 2018
    Linux wants the MMU to be disabled. Disable it before handing control
    over to Linux.
    
    We need to do that in assembly, as we must not touch the stack after
    disabling the MMU.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    [Jan: add missing register clobbering, align comments and tweak wording]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  7. inmates: x86: introduce architecture specific include directory

    rralf authored and jan-kiszka committed May 30, 2018
    Don't intermix sources and headers. Use an own include directory like on
    all other architectures.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 28, 2018
  1. inmates: arm: move calculation of CONFIG_INMATE_BASE to inmate_common.h

    rralf authored and jan-kiszka committed May 27, 2018
    We need to id-remap our own inmate. Therefore it needs to know its own
    base address. Currently, the base address is determined by
    CONFIG_INMATE_BASE in config.h.
    
    So far, only linker scripts used this definition. Now we need it for
    both: the linker script and in the code. Move it to inmate_common.h
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    [Jan: remove explicit config.h inclusion, indention tuning]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 27, 2018
  1. inmates: make map_range global

    rralf authored and jan-kiszka committed May 27, 2018
    This declaration can get global once paging is supported on all
    architectures.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  2. inmates: arm64: define more sysregs

    rralf authored and jan-kiszka committed May 27, 2018
    Same for arm64, define system registers and settings that we will use
    later.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  3. inmates: arm: define more sysregs

    rralf authored and jan-kiszka committed May 27, 2018
    For implementing MMU support, we need access to:
      - SCTLR
      - TTBCR
      - TTBR
      - MAIR
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  4. inmates: arm-common: define more sysregs

    rralf authored and jan-kiszka committed May 27, 2018
    Later we'll need more sysregs, define them now.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  5. inmates: arm-common: introduce sysregs_common.h

    rralf authored and jan-kiszka committed May 27, 2018
    Many sysregs are shared across arm and arm64. Introduce a common header
    for shared definitions.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  6. inmates: implement arch_init_early() routine

    rralf authored and jan-kiszka committed May 27, 2018
    Later we will use this function to do architecture-dependent
    initialisation. Like setting up the MMU on ARM(64).
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  7. inmates: make alloc() a common library function

    rralf authored and jan-kiszka committed May 27, 2018
    We later will use this function on ARM(64) for allocating page tables.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 26, 2018
  1. configs: Fix UART for ESPRESSObin Linux inmate

    jan-kiszka committed May 26, 2018
    Newer kernels use separate RX/TX interrupts. Also adjust the register
    size, according to the latest upstream device tree.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 25, 2018
  1. core: Fix paging_create when mapping single hugepages

    jan-kiszka committed May 25, 2018
    When mapping hugepages, we try to clean up previous mappings of smaller
    granularity for the target region first. Unfortunately, that could
    destroy table entries in higher levels when the specific tree became
    empty. This was easily reproducible by trying to map a single 2M region
    at an address where there are no other mappings around.
    
    The fix is to start the unmap with a subtree, rather than the full
    paging tree. This way we will only clear entries at levels below the one
    we are about to fill with a hugepage.
    
    As it seems, the unmapping path is currently not used for practical
    setups. The releasing impact could only by tested by artificially
    defining two memory regions where the first one builds up a mapping with
    3 levels and the second one overwrites this with only one level and a
    hugepage. This case seems unlikely to occur with normal Jailhouse
    reconfigurations. So we may consider dropping the cleanup path in the
    future. It's fixed and kept for now to avoid surprises if the assumption
    above no longer holds.
    
    Reported-by: Giovani Gracioli <giovanig@gmail.com>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 24, 2018
  1. inmates: add license header to setup.c

    rralf authored and jan-kiszka committed May 24, 2018
    I forgot to add a license header to setup.c. Add it now.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  2. inmates: x86: apic-demo: use alloc() instead of HEAP_BASE

    rralf authored and jan-kiszka committed May 24, 2018
    Now there is only one user left of HEAP_BASE: The alloc() function its
    self. Fold the definition to mem.c.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  3. core: reinitialise comm region on cell restart

    rralf authored and jan-kiszka committed May 23, 2018
    The communication region is RW for both, the inmate and the hypervisor.
    As a consequence, an inmate may overwrite the whole region. Currently,
    the region is filled in cell_create.
    
    Move initialisation to cell_start to provide a proper initial state when
    starting the cell. Move architecture specific initialisation to
    arch_cell_reset, which will be called by cell_start.
    
    Leave the cell's shut down state in cell_create to maintain a valid
    state after cell creation.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    [Jan: migrated cpu variable as well, massaged comment format in cell_start]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  4. Documentation: manpage: minor change

    rralf authored and jan-kiszka committed May 22, 2018
    Use different wording to make it easier to understand.
    
    (includes correct line-wrapping and the removal of a redundant \&.)
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  5. tools: jailhouse-cell-linux: align cmdline offsets

    rralf authored and jan-kiszka committed May 22, 2018
    Both archs now have the cmdline offset at 0x1000, we can now consolidate
    them and move them over to ARMCommon.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  6. Documentation: manpage: maintain changes in cmdline addresses

    rralf authored and jan-kiszka committed May 22, 2018
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  7. inmates: x86: move cmdline section to 0x1000

    rralf authored and jan-kiszka committed May 22, 2018
    Now all architectures use the same address for the cmdline section to
    ease the use of the cmdline.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  8. inmates: arm: move cmdline section to 0x1000

    rralf authored and jan-kiszka committed May 22, 2018
    This aligns the location of the cmdline section of ARM inmates with
    ARM64 inmates.
    
    Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    [Jan: adjust jailhouse-cell-linux as well]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  9. Documentation: Step-by-step instructions on how to setup Jailhouse on…

    iallende authored and jan-kiszka committed May 21, 2018
    … ZCU102 based on Xilinx ZynqMP Ultrascale+
    
    Signed-off-by: Imanol Allende <iallende@ikerlan.es>
    [Jan: wrap long line, remove trailing whitespaces]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  10. inmates/tools: x86: Move boot params into cmdline section

    jan-kiszka committed May 24, 2018
    Expand the cmdline buffer so that the boot params surely fit in and use
    that more stable address from now on.
    
    Suggested-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de>
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
  11. tools: cell-linux: Require cpu_reset_address to be 0

    jan-kiszka committed May 24, 2018
    Anything else is not supported by the loader.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 18, 2018
  1. configs: Set IRQ_TYPE_EDGE_RISING in DT nodes of virtual PCI host con…

    jan-kiszka committed May 18, 2018
    …troller
    
    We already do this for the overlay fragment the driver injects and the
    Seattle dts. For the latter, use that chance to install the symbolic
    value.
    
    The background is that newer Linux kernel dislike IRQ_TYPE_NONE and
    express that via WARN_ON during boot.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 14, 2018
  1. driver: Do not include arm-gic.h when not needed

    jan-kiszka committed May 14, 2018
    So far, it works for recent kernels, even on x86, but better not rely on
    this.
    
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Commits on May 11, 2018
  1. arm64: restructure get_cpu_parange

    MrVan authored and jan-kiszka committed May 11, 2018
    On ARM64 Big/Little Platform, such as i.MX8QM,
    there are two types of Cortex-A CPUs, Cortex-A53 and Cortex-A72.
    A53 ID_AA64MMFR0_EL1 shows its physical address range supported is 40bits.
    A72 ID_AA64MMFR0_EL1 shows its physical address range supported is 44bits.
    
    The minimal value 40 needs to be used as cpu parange, if using 44,
    A53 will be broken. So need to iterate the cpu parange of all the
    CPUs to find out the smallest one.
    
    Add a new percpu entry id_aa64mmfr0 whose low 4 bits holds parange.
    Fill id_aa64mmfr0 before runs into entry
    Move arm64 get_cpu_parange out to a new file
    Use percpu id_aa64mmfr0 in get_cpu_parange and choose the smallest value
    
    Then each time using get_cpu_parange, the smallest one will
    be chosen.
    
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    [Jan: made loop in get_cpu_parange() more compact]
    Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>