Verilator Getting-Started Guide

About

This repo gives an example of how to get started with Verilator.

verilator --binary -f verilator.f

References

Verilator Guides and References

• Install Guide: https://github.com/verilator/verilator/blob/master/docs/guide/install.rst
• Executable and Argument Reference: https://verilator.org/guide/latest/exe_verilator.html
• Configuration Files Reference: https://verilator.org/guide/latest/exe_verilator.html#configuration-files
• Errors and Warnings Reference: https://verilator.org/guide/latest/warnings.html

Exciting Verilator Issues

• Support full UVM -cc code generation: verilator/verilator#1538
• Support of unknown values (X) in design: verilator/verilator#3645
• Support IEEE 1800-2023: verilator/verilator#4718
• Timing support: verilator/verilator#3363

More Verilator Examples

• Basic project with behavioral and gate-level simulation: https://github.com/sifferman/calculator/blob/main/Makefile
• Project that creates a GUI to interact with the Verilator simulation: https://github.com/Rain92/FPGA-Mandelbrot