Skip to content
This repository has been archived by the owner on Jul 3, 2024. It is now read-only.

Fix HiFive1 Rev B DTS #316

Merged
merged 2 commits into from
Jul 29, 2019
Merged

Fix HiFive1 Rev B DTS #316

merged 2 commits into from
Jul 29, 2019

Conversation

nategraff-sifive
Copy link
Contributor

  • Adds missing devices (secondary and tertiary SPI, PWM, UART)
  • Makes PLIC interrupt map to match FE310-G002 Manual

@nategraff-sifive nategraff-sifive force-pushed the fix-hifive1-revb-dts branch 2 times, most recently from 110ab9a to 95e811f Compare July 23, 2019 21:41
@nategraff-sifive
Fix order and interrupts for devices on Rev B
8f7856d 
Also add second and third UART/SPI/PWM where applicable

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
@nategraff-sifive
Regen BSPs
8a4fa48 
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
@nategraff-sifive
Copy link
Contributor Author

Also adds external low frequency psdlfaltclk and missing fields for lfrosc.

@nullgemm nullgemm mentioned this pull request Jul 28, 2019
Closed
@nategraff-sifive nategraff-sifive merged commit 6712099 into master Jul 29, 2019
@nategraff-sifive nategraff-sifive deleted the fix-hifive1-revb-dts branch July 29, 2019 17:34
Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Reviewers

@palmer-dabbelt palmer-dabbelt Awaiting requested review from palmer-dabbelt

@bsousi5 bsousi5 Awaiting requested review from bsousi5

Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.

None yet
1 participant
@nategraff-sifive