This is an example RISC-V SoC implementation with an I2C interface on the Signaloid C0-microSD FPGA that can run C/C++ software.
This project offers Makefiles to build and flash the FPGA bitstream, and the firmware binary.
This project uses the following main components:
- 1x Signaloid C0-microSD compute module: a Lattice iCE40 based compute module in a microSD form factor.
- 1x MAX30100 Pulse/Oxymeter sensor: a sensor that integrates a pulse oximeter and heart-rate monitor.
- 1x SSD1306 128x32 OLED display: a small OLED display with 128x32 pixel resolution.
- 1x microSD card breakout board: to connect the Signaloid C0-microSD to the breadboard.
- Connecting wires and a breadboard.
- 3.3V Power supply.
This example extends the default Signaloid C0-microSD target design from litex-boards, and adds an I2C interface. It consists of:
- The Base SoC design, with IM support:
- VexRISC-V-Lite SoC, with IM support.
- UART interface for serial communication support.
- 12MHz default system clock.
- 128kiB SRAM.
- 14MiB binary & files storage on SPI Flash.
- An I2C interface, with the following features:
- I2C Master Hard IP from the Lattice iCE40UP fabric.
- 400kHz I2C bus speed.
- Pull-up resistors on SDA & SCL.
The firmware implements an I2C example, which reads the raw IR & red LED data from a MAX30100 Pulse/Oxymeter sensor, and displays them on an SSD1306 128x32 OLED display. All data is communicated over I2C. Also, application flow, all sensor data, and LED states are printed on UART.
For the purposes of this project, we modified and used the following repositories:
Note
This repository assumes that you have already installed the following tools:
- Yosys
- nextpnr
- IceStorm
- RISC-V GNU Toolchain, for RV32IM ISA extension
We recommend using the OSS CAD Suite to install Yosys, nextpnr, and IceStorm.
To clone this repository recursively, run the following command:
git clone --recursive git@github.com:signaloid/Signaloid-C0-microSD-litex-I2C-demo.gitIf you forgot to clone with --recursive and end up with empty submodule directories, you can remedy this with:
git submodule update --init --recursiveYou can update all submodules with the following commands:
git pull --recurse-submodules
git submodule update --remote --recursiveRun the environment preparation make command, on the project's root directory:
make prepBefore running this, make sure that the CROSS_COMPILE_PATH variable is properly set in the config.mk file with the installation path of the RISC-V GNU Toolchain for RV32IM ISA extension. Its default value is set to opt/riscv32im/bin. Also, make sure that the DEVICE variable in the config.mk file is set to the correct device path (follow the Identify the Signaloid C0-microSD guide).
Run this in the project's root directory:
make flashThis repository consists of several subdirectories.
gateware/: LiteX SoC design.firmware/: C/C++ based code example.build/: LiteX generated directory after the building process. Contains the FPGA design bitstream, the LiteX generated C libraries, the compiled firmware binary, and the LiteX autogenerated documentation.submodules/: Dependencies on tools outside this repository.- C0-microSD-utilities: C0-microSD-toolkit for flashing purposes.
Makefile: Main Makefile for building and flashing both gateware and firmware.firmware/Makefile: Makefile for building and flashing the firmware only. For more details seefirmware/README.md.
You should run the following commands from the project's root directory, where the main Makefile is located.
make: Build both gateware and firmware. This command:- Prepares the environment for development, if it not already prepared.
- Builds the LiteX gateware, and software libraries.
- Proceeds with synthesis, place 'n' route, and pack to the final bitstream.
- Builds the LiteX autogenerated SoC documentation, in the
build/signaloid_c0_microsd/docs/html/directory. - Builds the C firmware.
make flash: Flash both gateware and firmware.make clean: Clean all build files.make clean-env: Clean the Python virtual environment.make prep: Prepare the environment for development. This command:- Clones all git submodules in the submodules directory.
- Creates a python virtual environment at
.venv. - Installs all required python packages defined in the requirements.txt file using pip.
make gateware: Build the gateware.make flash-gateware: Flash the gateware.make test-target: Test the gateware target script for verilog compilation errors.make firmware: Build the C firmware.make flash-firmware: Flash the firmware.make clean-firmware: Clean the firmware build files.make print-vars-firmware: Print the firmware Makefile variables.make print-vars: Print the main Makefile variables.
The gateware bitstream is stored in the build/signaloid_c0_microsd/gateware/ directory with the name signaloid_c0_microsd.bin.
The firmware binary is stored in the build/signaloid_c0_microsd/software/ directory with the name signaloid_c0_microsd_firmware.bin.
