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Part 7, Generic Interrupts

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singpolyma committed Feb 1, 2013
1 parent c76d4db commit 876a9d088b3402141cc57d8348d1c6037bffce13
Showing with 37 additions and 4 deletions.
  1. +1 −0 asm.h
  2. +28 −3 kernel.c
  3. +6 −0 syscalls.s
  4. +2 −1 versatilepb.h
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1 asm.h
@@ -3,3 +3,4 @@ int fork(void);
int getpid(void);
int write(int fd, const void *buf, size_t count);
int read(int fd, void *buf, size_t count);
void interrupt_wait(int intr);
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@@ -44,6 +44,7 @@ void bwputs(char *s) {
#define TASK_READY 0
#define TASK_WAIT_READ 1
#define TASK_WAIT_WRITE 2
#define TASK_WAIT_INTR 3
/* This pathserver assumes that all files are FIFOs that were registered
with mkfifo. It also assumes a global tables of FDs shared by all
@@ -300,9 +301,33 @@ int main(void) {
case 0x4: /* read */
_read(tasks[current_task], tasks, task_count, pipes);
break;
case -4: /* Timer 0 or 1 went off */
if(*(TIMER0 + TIMER_MIS)) { /* Timer0 went off */
*(TIMER0 + TIMER_INTCLR) = 1; /* Clear interrupt */
case 0x5: /* interrupt_wait */
/* Enable interrupt */
*(PIC + VIC_INTENABLE) = tasks[current_task][2+0];
/* Block task waiting for interrupt to happen */
tasks[current_task][-1] = TASK_WAIT_INTR;
break;
default: /* Catch all interrupts */
if((int)tasks[current_task][2+7] < 0) {
unsigned int intr = (1 << -tasks[current_task][2+7]);
if(intr == PIC_TIMER01) {
/* Never disable timer. We need it for pre-emption */
if(*(TIMER0 + TIMER_MIS)) { /* Timer0 went off */
*(TIMER0 + TIMER_INTCLR) = 1; /* Clear interrupt */
}
} else {
/* Disable interrupt, interrupt_wait re-enables */
*(PIC + VIC_INTENCLEAR) = intr;
}
/* Unblock any waiting tasks
XXX: nondeterministic unblock order
*/
for(i = 0; i < task_count; i++) {
if(tasks[i][-1] == TASK_WAIT_INTR && tasks[i][2+0] == intr) {
tasks[i][-1] = TASK_READY;
}
}
}
}
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@@ -22,3 +22,9 @@ read:
mov r7, #0x4
svc 0
bx lr
.global interrupt_wait
interrupt_wait:
push {r7}
mov r7, #0x5
svc 0
bx lr
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@@ -19,4 +19,5 @@
#define PIC ((volatile unsigned int*)0x10140000)
#define PIC_TIMER01 0x10
/* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0181e/I1006461.html */
#define VIC_INTENABLE 0x4 /* 0x10 bytes */
#define VIC_INTENABLE 0x4 /* 0x10 bytes */
#define VIC_INTENCLEAR 0x5 /* 0x14 bytes */

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