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nv1a,nv1f/disp: fix memory clock rate retrieval

Based on the xf86-video-nv code, NFORCE (NV1A) and NFORCE2 (NV1F) have a
different way of retrieving clocks. See the
nv_hw.c:nForceUpdateArbitrationSettings function in the original code
for how these clocks were accessed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54587
Cc: stable@vger.kernel.org
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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imirkin authored and skeggsb committed Jan 21, 2017
1 parent 7e8bfdc commit 883bf734d0c30dab7471520530c9a03fdee448ff
Showing with 2 additions and 1 deletion.
  1. +2 −1 drm/nouveau/dispnv04/hw.c
@@ -222,6 +222,7 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
uint32_t mpllP;

pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
mpllP = (mpllP >> 8) & 0xf;
if (!mpllP)
mpllP = 4;

@@ -232,7 +233,7 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
uint32_t clock;

pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
return clock;
return clock / 1000;
}

ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals);

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