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bar/gf100: fix access to upper half of BAR2
Bit 30 being set causes the upper half of BAR2 to stay in physical mode,
mapped over the end of VRAM, even when the rest of the BAR has been set
to virtual mode.

We inherited our initial value from RM, but I'm not aware of any reason
we need to keep it that way.

This fixes severe GPU hang/lockup issues revealed by Wayland on F26.

Shout-out to NVIDIA for the quick response with the potential cause!

Signed-off-by: Ben Skeggs <>
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skeggsb committed Jul 25, 2017
1 parent 646f623 commit bdce6c8
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drm/nouveau/nvkm/subdev/bar/gf100.c
Expand Up @@ -129,7 +129,7 @@ gf100_bar_init(struct nvkm_bar *base)

if (bar->bar[0].mem) {
addr = nvkm_memory_addr(bar->bar[0].mem) >> 12;
nvkm_wr32(device, 0x001714, 0xc0000000 | addr);
nvkm_wr32(device, 0x001714, 0x80000000 | addr);

return 0;
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