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@openrisc

Popular repositories

  1. llvm-or1k

    LLVM backend for OpenRISC 1000

    C++ 8 8

  2. clang-or1k

    Clang for OpenRISC 1000

    C++ 7 6

  3. wb_sdram_ctrl

    SDRAM controller with multiple wishbone slave ports

    Verilog 5 4

  4. compiler-rt-or1k

    "compiler-rt" Runtime Library with OpenRISC 1000 support

    C 4

  5. diila

    A Device Independent Integrated Logic Analyzer

    Verilog 4 2

  6. ar100-info

    C 4 1

4 contributions in the last year

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Contribution activity First pull request First issue First repository Joined GitHub

January 2017

skristiansson has no activity yet for this period.

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