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@openrisc

Popular repositories

  1. llvm-or1k

    LLVM backend for OpenRISC 1000

    8 C++

  2. clang-or1k

    Clang for OpenRISC 1000

    7 C++

  3. wb_sdram_ctrl

    SDRAM controller with multiple wishbone slave ports

    5 Verilog

  4. compiler-rt-or1k

    "compiler-rt" Runtime Library with OpenRISC 1000 support

    4 C

  5. diila

    A Device Independent Integrated Logic Analyzer

    4 Verilog

  6. ar100-info

    4 C

2 contributions in the last year

Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Mon Wed Fri

Contribution activity First pull request First issue First repository Joined GitHub

July - September 2016

skristiansson has no activity yet for this period.

June 2016

Created 1 commit in 1 repository

openrisc/mor1kx 1 commit

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