Merge pull request #1087 from slaclab/512fft-tkid2

Allow some Adc32Rf45 parameters to be loaded via yaml
slaclab · Jun 16, 2023 · c4d40de · c4d40de
2 parents f222da2 + 394959b
commit c4d40de
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Showing 2 changed files with 18 additions and 6 deletions.
diff --git a/python/surf/devices/ti/_Adc32Rf45.py b/python/surf/devices/ti/_Adc32Rf45.py
@@ -46,6 +46,8 @@ def __init__( self, verify=True, **kwargs):
         chB             = (0x8 << 14)
         rawInterface    = (0x1 << 18)                         # 0x40000
 
+
+
         #####################
         # Add Device Channels
         #####################
@@ -1065,12 +1067,14 @@ def JESD_DDC_config():
                 channel.DECIM_FACTOR.set(0x0,write=True)
                 channel.DUAL_BAND_EN.set(0x0,write=True)
                 channel.REAL_OUT_EN.set(0x0,write=True)
-                channel.DDC0_NCO1_LSB.set(0x00,write=True)
-                channel.DDC0_NCO1_MSB.set(0x4e,write=True)
-                channel.DDC0_NCO2_LSB.set(0x00,write=True)
-                channel.DDC0_NCO2_MSB.set(0x00,write=True)
-                channel.DDC0_NCO3_LSB.set(0x00,write=True)
-                channel.DDC0_NCO3_MSB.set(0x00,write=True)
+                # Write the value that has been loaded via yaml,
+                # or write the default value defined in _AdcRf45Channel.py
+                channel.DDC0_NCO1_LSB.write()
+                channel.DDC0_NCO1_MSB.write()
+                channel.DDC0_NCO2_LSB.write()
+                channel.DDC0_NCO2_MSB.write()
+                channel.DDC0_NCO3_LSB.write()
+                channel.DDC0_NCO3_MSB.write()
                 channel.NCO_SEL_PIN.set(0x00,write=True)
                 channel.NCO_SEL.set(0x00,write=True)
                 channel.LMFC_RESET_MODE.set(0x00,write=True)

diff --git a/python/surf/devices/ti/_Adc32Rf45Channel.py b/python/surf/devices/ti/_Adc32Rf45Channel.py
@@ -585,6 +585,7 @@ def __init__( self, verify=True, **kwargs):
             bitOffset    =  0,
             base         = pr.UInt,
             mode         = "RW",
+            value        = 0x00,
             verify       = verify,
             overlapEn    = True,
         ))
@@ -598,6 +599,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x4e, # 748.8 Mhz
             overlapEn    = True,
         ))
 
@@ -610,6 +612,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x00,
             overlapEn    = True,
         ))
 
@@ -622,6 +625,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x00,
             overlapEn    = True,
         ))
 
@@ -634,6 +638,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x00,
             overlapEn    = True,
         ))
 
@@ -646,6 +651,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x00,
             overlapEn    = True,
         ))
 
@@ -658,6 +664,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x00,
             overlapEn    = True,
         ))
 
@@ -670,6 +677,7 @@ def __init__( self, verify=True, **kwargs):
             base         = pr.UInt,
             mode         = "RW",
             verify       = verify,
+            value        = 0x00,
             overlapEn    = True,
         ))